Searched refs:I915_READ16 (Results 1 – 6 of 6) sorted by relevance
190 if (I915_READ16(C0DRB3) != I915_READ16(C1DRB3)) { in i915_gem_detect_bit_6_swizzle()
918 crstanddelay = I915_READ16(CRSTANDVID); in i915_rstdby_delays()935 u16 rgvswctl = I915_READ16(MEMSWCTL); in i915_cur_delayinfo()936 u16 rgvstat = I915_READ16(MEMSTAT_ILK); in i915_cur_delayinfo()1084 crstandvid = I915_READ16(CRSTANDVID); in ironlake_drpc_info()1568 I915_READ16(C0DRB3)); in i915_swizzle_info()1570 I915_READ16(C1DRB3)); in i915_swizzle_info()
1516 error->ier = I915_READ16(IER); in i915_capture_error_state()2481 if (I915_READ16(ISR) & flip_pending) in i8xx_handle_vblank()2504 iir = I915_READ16(IIR); in i8xx_irq_handler()2536 new_iir = I915_READ16(IIR); /* Flush posted writes */ in i8xx_irq_handler()2569 I915_WRITE16(IIR, I915_READ16(IIR)); in i8xx_irq_uninstall()
585 ddrpll = I915_READ16(DDRMPLL1); in i915_ironlake_get_mem_freq()586 csipll = I915_READ16(CSIPLL0); in i915_ironlake_get_mem_freq()2311 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_set_drps()2403 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_disable_drps()
1330 reg->val = I915_READ16(reg->offset); in i915_reg_read_ioctl()
1912 #define I915_READ16(reg) i915_read16(dev_priv, (reg)) macro