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Searched refs:MI_NO_WRITE_FLUSH (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_ringbuffer.c64 cmd |= MI_NO_WRITE_FLUSH; in gen2_render_ring_flush()
117 cmd = MI_FLUSH | MI_NO_WRITE_FLUSH; in gen4_render_ring_flush()
119 cmd &= ~MI_NO_WRITE_FLUSH; in gen4_render_ring_flush()
Di915_dma.c529 OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP); in i915_dispatch_batchbuffer()
Di915_reg.h203 #define MI_NO_WRITE_FLUSH (1 << 2) macro