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Searched refs:NV (Results 1 – 17 of 17) sorted by relevance

/drivers/staging/nvec/
DKconfig2 tristate "NV Tegra Embedded Controller SMBus Interface"
/drivers/net/hamradio/
Dz8530.h107 #define NV 2 /* No Vector */ macro
Ddmascc.c494 write_scc(priv, R9, FHWRES | MIE | NV); in setup_adapter()
755 write_scc(priv, R9, (priv->channel ? CHRB : CHRA) | MIE | NV); in scc_open()
877 write_scc(priv, R9, (priv->channel ? CHRB : CHRA) | MIE | NV); in scc_close()
/drivers/tty/serial/
Dzs.h161 #define NV 2 /* No Vector */ macro
Dip22zilog.h143 #define NV 2 /* No Vector */ macro
Dsunzilog.h144 #define NV 2 /* No Vector */ macro
Dpmac_zilog.h236 #define NV 2 /* No Vector */ macro
Dpmac_zilog.c803 write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV); in pmz_fix_zero_bug_scc()
809 write_zsreg(uap, 9, NV); /* Didn't we already do this? */ in pmz_fix_zero_bug_scc()
825 write_zsreg(uap, 9, NV); in pmz_fix_zero_bug_scc()
883 uap->curregs[R9] |= NV | MIE; in __pmz_startup()
Dsunzilog.c1350 up->curregs[R9] = NV; in sunzilog_init_hw()
1366 up->curregs[R9] = NV; in sunzilog_init_hw()
Dip22zilog.c1136 up->curregs[R9] = NV | MIE; in ip22zilog_prepare()
Dzs.c119 MIE | DLC | NV, /* write 9 */
/drivers/video/riva/
Dnvreg.h40 #define DEVICE_BASE(device) (0?NV##_##device)
41 #define DEVICE_SIZE(device) ((1?NV##_##device) - DEVICE_BASE(device)+1)
/drivers/net/wan/
Dz85230.h128 #define NV 2 /* No Vector */ macro
Dz85230.c231 9, NV|MIE|NORESET,
256 9, NV|MIE|NORESET,
/drivers/mtd/devices/
DKconfig40 tristate "DEC MS02-NV NVRAM module support"
43 This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
/drivers/mtd/maps/
DKconfig301 bool "NV-RAM mapping AUTCPU12 board"
304 This enables access to the NV-RAM on autronix autcpu12 board.
/drivers/iommu/
Dtegra-smmu.c251 HWGRP_INIT(NV),