Searched refs:NV03_PFIFO_CACHE1_PUSH0 (Results 1 – 5 of 5) sorted by relevance
/drivers/gpu/drm/nouveau/core/engine/fifo/ |
D | nv04.c | 207 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 0); in nv04_fifo_chan_fini() 227 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_chan_fini() 436 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error() 437 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) & ~1); in nv04_fifo_cache_error() 439 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error() 440 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) | 1); in nv04_fifo_cache_error() 629 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_init()
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D | nv04.h | 36 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro
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D | nv17.c | 193 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv17_fifo_init()
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D | nv40.c | 334 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv40_fifo_init()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_reg.h | 470 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro
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