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Searched refs:NV03_PFIFO_CACHE1_PUSH0 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/nouveau/core/engine/fifo/
Dnv04.c207 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 0); in nv04_fifo_chan_fini()
227 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_chan_fini()
436 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error()
437 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) & ~1); in nv04_fifo_cache_error()
439 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, in nv04_fifo_cache_error()
440 nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH0) | 1); in nv04_fifo_cache_error()
629 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv04_fifo_init()
Dnv04.h36 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro
Dnv17.c193 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv17_fifo_init()
Dnv40.c334 nv_wr32(priv, NV03_PFIFO_CACHE1_PUSH0, 1); in nv40_fifo_init()
/drivers/gpu/drm/nouveau/
Dnouveau_reg.h470 #define NV03_PFIFO_CACHE1_PUSH0 0x00003200 macro