Searched refs:NV04_PFIFO_CACHE1_DMA_STATE (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/nouveau/core/engine/fifo/ |
| D | nv04.h | 107 #define NV04_PFIFO_CACHE1_DMA_STATE 0x00003228 macro
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| D | nv10.c | 45 { 32, 0, 0x10, 0, NV04_PFIFO_CACHE1_DMA_STATE },
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| D | nv17.c | 45 { 32, 0, 0x10, 0, NV04_PFIFO_CACHE1_DMA_STATE },
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| D | nv40.c | 45 { 32, 0, 0x14, 0, NV04_PFIFO_CACHE1_DMA_STATE },
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| D | nv04.c | 48 { 32, 0, 0x0c, 0, NV04_PFIFO_CACHE1_DMA_STATE },
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_reg.h | 541 #define NV04_PFIFO_CACHE1_DMA_STATE 0x00003228 macro
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