Home
last modified time | relevance | path

Searched refs:NV_PRAMDAC_TEST_CONTROL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/nouveau/dispnv04/
Ddac.c155 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL); in nv04_dac_detect()
156 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, in nv04_dac_detect()
216 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL, saved_rtest_ctrl); in nv04_dac_detect()
255 saved_rtest_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
256 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, in nv17_dac_sample_load()
301 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
302 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL, in nv17_dac_sample_load()
306 sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
308 sample &= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv17_dac_sample_load()
310 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); in nv17_dac_sample_load()
[all …]
Dtvnv17.c76 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); in nv42_tv_sample_load()
95 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0); in nv42_tv_sample_load()
109 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
115 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset) in nv42_tv_sample_load()
123 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl); in nv42_tv_sample_load()
604 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + in nv17_tv_commit()
608 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + in nv17_tv_commit()
Dnvreg.h348 #define NV_PRAMDAC_TEST_CONTROL 0x00680608 macro
Ddfp.c467 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000); in nv04_dfp_commit()
469 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000); in nv04_dfp_commit()