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Searched refs:PARITY (Results 1 – 11 of 11) sorted by relevance

/drivers/staging/rts5139/
Dxd.h160 #define PARITY 10 macro
Dxd.c657 && (redunt[PARITY] & XD_BA1_ALL0)) { in reset_xd()
697 if ((redunt[PARITY] & (XD_ECC1_ALL1 | XD_ECC2_ALL1)) != in xd_check_data_blank()
713 if (redunt[PARITY] & XD_BA1_BA2_EQL) in xd_load_log_block_addr()
716 else if (redunt[PARITY] & XD_BA1_VALID) in xd_load_log_block_addr()
719 else if (redunt[PARITY] & XD_BA2_VALID) in xd_load_log_block_addr()
/drivers/scsi/
DNCR5380.h109 #ifdef PARITY
DFlashPoint.c513 #define PARITY BIT(5) macro
2276 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_sfm()
2293 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_sfm()
2298 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_sfm()
3854 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_schkdd()
3858 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_schkdd()
4411 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_phaseChkFifo()
4414 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_phaseChkFifo()
4440 if ((RDW_HARPOON((port + hp_intstat)) & PARITY) && in FPT_phaseChkFifo()
4444 WRW_HARPOON((port + hp_intstat), PARITY); in FPT_phaseChkFifo()
D53c700.h282 #define PARITY 0x08 macro
Daha152x.c614 #define PARITY (HOSTDATA(shpnt)->parity) macro
811 PARITY = setup->parity; in aha152x_probe_one()
851 PARITY ? "enabled" : "disabled", in aha152x_probe_one()
1651 SETPORT(SXFRCTL1, (PARITY ? ENSPCHK : 0 ) | ENSTIMER); in busfree_run()
3331 PARITY ? "enabled" : "disabled"); in aha152x_show_info()
D53c700.c685 NCR_700_writeb(FULL_ARBITRATION | ENABLE_PARITY | PARITY in NCR_700_chip_setup()
699 | PARITY | AUTO_ATN, host, SCNTL0_REG); in NCR_700_chip_setup()
DNCR5380.c651 #ifdef PARITY in NCR5380_print_options()
Dsun3_NCR5380.c645 #ifdef PARITY in NCR5380_print_options()
Datari_NCR5380.c703 #ifdef PARITY in NCR5380_print_options()
/drivers/input/serio/
Dat32psif.c118 if (status & PSIF_BIT(PARITY)) in psif_interrupt()