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Searched refs:PCH_PP_STATUS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_dp.c258 pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS; in ironlake_edp_have_panel_power()
282 pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS; in intel_dp_check_edp()
924 pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS; in ironlake_wait_panel_status()
1004 pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS; in ironlake_edp_panel_vdd_on()
1033 pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS; in ironlake_panel_vdd_off_sync()
Dintel_lvds.c189 stat_reg = PCH_PP_STATUS; in intel_enable_lvds()
214 stat_reg = PCH_PP_STATUS; in intel_disable_lvds()
Di915_reg.h4134 #define PCH_PP_STATUS 0xc7200 macro
/drivers/pci/
Dquirks.c3172 val = ioread32(mmio_base + PCH_PP_STATUS); in reset_ivb_igd()