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Searched refs:PIPECONF_INTERLACE_MASK_HSW (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h2703 #define PIPECONF_INTERLACE_MASK_HSW (3 << 21) macro
Dintel_display.c1757 if ((pipeconf_val & PIPECONF_INTERLACE_MASK_HSW) == in lpt_enable_pch_transcoder()
5258 val &= ~PIPECONF_INTERLACE_MASK_HSW; in haswell_set_pipeconf()