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Searched refs:PIPE_CONTROL_QW_WRITE (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_ringbuffer.c201 intel_ring_emit(ring, PIPE_CONTROL_QW_WRITE); in intel_emit_post_sync_nonzero_flush()
248 flags |= PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_CS_STALL; in gen6_render_ring_flush()
320 flags |= PIPE_CONTROL_QW_WRITE; in gen7_render_ring_flush()
678 intel_ring_emit(ring__, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | \
704 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()
722 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()
Di915_reg.h320 #define PIPE_CONTROL_QW_WRITE (1<<14) macro