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Searched refs:PIPE_START_VBLANK_INTERRUPT_STATUS (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h528 #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL << 2) macro
/drivers/gpu/drm/i915/
Di915_reg.h2765 #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ macro
Di915_irq.c2979 if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS && in i965_irq_handler()