Searched refs:POSTING_READ (Results 1 – 20 of 20) sorted by relevance
170 POSTING_READ(VIDEO_DIP_CTL); in g4x_write_infoframe()208 POSTING_READ(reg); in ibx_write_infoframe()249 POSTING_READ(reg); in cpt_write_infoframe()287 POSTING_READ(reg); in vlv_write_infoframe()320 POSTING_READ(ctl_reg); in hsw_write_infoframe()401 POSTING_READ(reg); in g4x_set_infoframes()421 POSTING_READ(reg); in g4x_set_infoframes()431 POSTING_READ(reg); in g4x_set_infoframes()458 POSTING_READ(reg); in ibx_set_infoframes()481 POSTING_READ(reg); in ibx_set_infoframes()[all …]
101 POSTING_READ(DEIMR); in ironlake_enable_display_irq()111 POSTING_READ(DEIMR); in ironlake_disable_display_irq()127 POSTING_READ(reg); in i915_enable_pipestat()141 POSTING_READ(reg); in i915_disable_pipestat()518 POSTING_READ(GEN7_MISCCPCTL); in ivybridge_parity_work()527 POSTING_READ(GEN7_L3CDERRST1); in ivybridge_parity_work()613 POSTING_READ(GEN6_PMIMR); in gen6_queue_rps_work()861 POSTING_READ(SDEIER); in ivybridge_irq_handler()911 POSTING_READ(DEIER); in ivybridge_irq_handler()914 POSTING_READ(SDEIER); in ivybridge_irq_handler()[all …]
186 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()214 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()224 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()233 POSTING_READ(_FDI_RXA_MISC); in hsw_fdi_link_train()255 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()262 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()268 POSTING_READ(_FDI_RXA_CTL); in hsw_fdi_link_train()275 POSTING_READ(_FDI_RXA_MISC); in hsw_fdi_link_train()773 POSTING_READ(SPLL_CTL); in intel_ddi_put_crtc_pll()783 POSTING_READ(WRPLL_CTL1); in intel_ddi_put_crtc_pll()[all …]
137 POSTING_READ(SPSURF(pipe, plane)); in vlv_update_plane()153 POSTING_READ(SPSURF(pipe, plane)); in vlv_disable_plane()180 POSTING_READ(SPKEYMSK(pipe, plane)); in vlv_update_colorkey()311 POSTING_READ(SPRSURF(pipe)); in ivb_update_plane()333 POSTING_READ(SPRSURF(pipe)); in ivb_disable_plane()366 POSTING_READ(SPRKEYMSK(intel_plane->pipe)); in ivb_update_colorkey()479 POSTING_READ(DVSSURF(pipe)); in ilk_update_plane()495 POSTING_READ(DVSSURF(pipe)); in ilk_disable_plane()556 POSTING_READ(DVSKEYMSK(intel_plane->pipe)); in ilk_update_colorkey()
344 POSTING_READ(dpll_a_reg); in i915_restore_display_reg()351 POSTING_READ(dpll_a_reg); in i915_restore_display_reg()355 POSTING_READ(_DPLL_A_MD); in i915_restore_display_reg()413 POSTING_READ(dpll_b_reg); in i915_restore_display_reg()420 POSTING_READ(dpll_b_reg); in i915_restore_display_reg()424 POSTING_READ(_DPLL_B_MD); in i915_restore_display_reg()
798 POSTING_READ(DP_A); in ironlake_set_pll_edp()1008 POSTING_READ(pp_ctrl_reg); in ironlake_edp_panel_vdd_on()1037 POSTING_READ(pp_ctrl_reg); in ironlake_panel_vdd_off_sync()1104 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1114 POSTING_READ(pp_ctrl_reg); in ironlake_edp_panel_on()1121 POSTING_READ(PCH_PP_CONTROL); in ironlake_edp_panel_on()1147 POSTING_READ(pp_ctrl_reg); in ironlake_edp_panel_off()1180 POSTING_READ(pp_ctrl_reg); in ironlake_edp_backlight_on()1204 POSTING_READ(pp_ctrl_reg); in ironlake_edp_backlight_off()1230 POSTING_READ(DP_A); in ironlake_edp_pll_on()[all …]
477 POSTING_READ(DPIO_CTL); in vlv_init_dpio()479 POSTING_READ(DPIO_CTL); in vlv_init_dpio()1490 POSTING_READ(reg); in intel_enable_pll()1493 POSTING_READ(reg); in intel_enable_pll()1496 POSTING_READ(reg); in intel_enable_pll()1525 POSTING_READ(reg); in intel_disable_pll()1631 POSTING_READ(reg); in ironlake_enable_pch_pll()1675 POSTING_READ(reg); in intel_disable_pch_pll()2172 POSTING_READ(reg); in i9xx_update_plane()2262 POSTING_READ(reg); in ironlake_update_plane()[all …]
785 POSTING_READ(GTIMR); in gen5_ring_get_irq()803 POSTING_READ(GTIMR); in gen5_ring_put_irq()822 POSTING_READ(IMR); in i9xx_ring_get_irq()840 POSTING_READ(IMR); in i9xx_ring_put_irq()910 POSTING_READ(mmio); in intel_ring_setup_status_page()972 POSTING_READ(GTIMR); in gen6_ring_get_irq()994 POSTING_READ(GTIMR); in gen6_ring_put_irq()1540 POSTING_READ(RING_TAIL(ring->mmio_base)); in gen6_bsd_ring_write_tail()
282 POSTING_READ(crt->adpa_reg); in intel_ironlake_crt_detect_hotplug()506 POSTING_READ(pipeconf_reg); in intel_crt_load_detect()670 POSTING_READ(crt->adpa_reg); in intel_crt_reset()
743 POSTING_READ(D_STATE); in i8xx_do_reset()750 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()754 POSTING_READ(DEBUG_RESET_I830); in i8xx_do_reset()760 POSTING_READ(D_STATE); in i8xx_do_reset()
192 POSTING_READ(GEN6_BLITTER_ECOSKPD); in sandybridge_blit_fbc_update()2376 POSTING_READ(VIDSTART); in ironlake_enable_drps()2477 POSTING_READ(GEN6_RPNSWREQ); in gen6_set_rps()2773 POSTING_READ(PWRCTXA); in ironlake_disable_rc6()2776 POSTING_READ(RSTDBYCTL); in ironlake_disable_rc6()3402 POSTING_READ(ECR); in intel_init_emon()4327 POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */ in __gen6_gt_force_wake_reset()4337 POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */ in __gen6_gt_force_wake_get()4350 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_mt_reset()4368 POSTING_READ(ECOBUS); in __gen6_gt_force_wake_mt_get()[all …]
134 POSTING_READ(bus->gpio_reg); in set_clock()151 POSTING_READ(bus->gpio_reg); in set_data()
198 POSTING_READ(lvds_encoder->reg); in intel_enable_lvds()227 POSTING_READ(lvds_encoder->reg); in intel_disable_lvds()
354 POSTING_READ(reg); in intel_panel_enable_backlight()
1222 POSTING_READ(TV_DAC); in intel_tv_detect_type()1252 POSTING_READ(TV_CTL); in intel_tv_detect_type()
142 POSTING_READ(VGA_PD); in i915_restore_vga()
2561 POSTING_READ(fence_reg); in i965_write_fence_reg()2605 POSTING_READ(reg); in i915_write_fence_reg()2637 POSTING_READ(FENCE_REG_830_0 + reg * 4); in i830_write_fence_reg()3898 POSTING_READ(GEN7_MISCCPCTL); in i915_gem_l3_remap()3911 POSTING_READ(GEN7_L3LOG_BASE); in i915_gem_l3_remap()
459 POSTING_READ(GFX_FLSH_CNTL_GEN6); in gen6_ggtt_insert_entries()
1289 POSTING_READ(intel_sdvo->sdvo_reg); in intel_disable_sdvo()1293 POSTING_READ(intel_sdvo->sdvo_reg); in intel_disable_sdvo()
1925 #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) macro