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Searched refs:RES_EXT_INT (Results 1 – 13 of 13) sorted by relevance

/drivers/tty/serial/
Dip22zilog.h57 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
271 #define ZS_CLEARSTAT(channel) do { writeb(RES_EXT_INT, &channel->control); \
Dsunzilog.h49 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
279 #define ZS_CLEARSTAT(channel) do { sbus_writeb(RES_EXT_INT, &channel->control); \
Dpmac_zilog.c184 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
185 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs()
343 write_zsreg(uap, R0, RES_EXT_INT); in pmz_status_handle()
816 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
817 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
818 write_zsreg(uap, 0, RES_EXT_INT); /* to kill some time */ in pmz_fix_zero_bug_scc()
831 write_zsreg(uap, 0, RES_EXT_INT); in pmz_fix_zero_bug_scc()
Dzs.h78 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
Dpmac_zilog.h146 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
Dip22zilog.c219 write_zsreg(channel, R0, RES_EXT_INT); in __load_zsregs()
220 write_zsreg(channel, R0, RES_EXT_INT); in __load_zsregs()
324 writeb(RES_EXT_INT, &channel->control); in ip22zilog_status_handle()
Dzs.c501 write_zsreg(zport_a, R0, RES_EXT_INT); in zs_enable_ms()
696 write_zsreg(zport, R0, RES_EXT_INT); in zs_status_handle()
785 write_zsreg(zport, R0, RES_EXT_INT); in zs_startup()
Dsunzilog.c252 write_zsreg(channel, R0, RES_EXT_INT); /* First Latch */ in __load_zsregs()
253 write_zsreg(channel, R0, RES_EXT_INT); /* Second Latch */ in __load_zsregs()
413 writeb(RES_EXT_INT, &channel->control); in sunzilog_status_handle()
/drivers/net/hamradio/
Dscc.c497 Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */ in scc_exint()
510 Outb(scc->ctrl,RES_EXT_INT); in scc_exint()
873 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ in init_channel()
874 Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */ in init_channel()
1410 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ in scc_stop_calibrate()
1411 Outb(scc->ctrl,RES_EXT_INT); in scc_stop_calibrate()
1443 Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ in scc_start_calibrate()
1444 Outb(scc->ctrl,RES_EXT_INT); in scc_start_calibrate()
Dz8530.h25 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
Ddmascc.c526 write_scc(priv, R0, RES_EXT_INT); in setup_adapter()
545 write_scc(priv, R0, RES_EXT_INT); in setup_adapter()
1319 write_scc(priv, R0, RES_EXT_INT); in es_isr()
1347 write_scc(priv, R0, RES_EXT_INT); in es_isr()
1348 write_scc(priv, R0, RES_EXT_INT); in es_isr()
/drivers/net/wan/
Dz85230.h46 #define RES_EXT_INT 0x10 /* Reset Ext. Status Interrupts */ macro
Dz85230.c482 write_zsctrl(chan, RES_EXT_INT); in z8530_status()
603 write_zsctrl(chan, RES_EXT_INT); in z8530_dma_status()
677 write_zsctrl(chan, RES_EXT_INT); in z8530_status_clear()