/drivers/net/wireless/rtlwifi/rtl8192se/ |
D | rf.c | 57 [RF90_PATH_A][chnl - 1]; in _rtl92s_get_powerbase() 105 [RF90_PATH_A][ in _rtl92s_get_powerbase() 112 [RF90_PATH_A][ in _rtl92s_get_powerbase() 249 [RF90_PATH_A][chnl - 1]); in _rtl92s_get_txpower_writeval_byregulatory() 254 [RF90_PATH_A][chnl - 1]); in _rtl92s_get_txpower_writeval_byregulatory() 266 [RF90_PATH_A][chnl - 1]) { in _rtl92s_get_txpower_writeval_byregulatory() 269 [RF90_PATH_A][chnl - 1]; in _rtl92s_get_txpower_writeval_byregulatory() 274 [RF90_PATH_A][chnl - 1]) { in _rtl92s_get_txpower_writeval_byregulatory() 277 [RF90_PATH_A][chnl - 1]; in _rtl92s_get_txpower_writeval_byregulatory() 441 case RF90_PATH_A: in rtl92s_phy_rf6052_config() [all …]
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D | phy.c | 114 if (rfpath == RF90_PATH_A) in _rtl92s_phy_rf_serial_read() 134 if (rfpath == RF90_PATH_A) in _rtl92s_phy_rf_serial_read() 710 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92s_phy_init_register_definition() 716 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92s_phy_init_register_definition() 722 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in _rtl92s_phy_init_register_definition() 728 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in _rtl92s_phy_init_register_definition() 734 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92s_phy_init_register_definition() 744 rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = RFPGA0_XAB_RFPARAMETER; in _rtl92s_phy_init_register_definition() 750 rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92s_phy_init_register_definition() 756 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1; in _rtl92s_phy_init_register_definition() [all …]
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D | dm.c | 170 thermalvalue = (u8)rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f); in _rtl92s_dm_txpowertracking_callback_thermalmeter() 218 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, in _rtl92s_dm_check_txpowertracking_thermalmeter() 332 rssi_a = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_A]; in _rtl92s_dm_switch_baseband_mrc()
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/drivers/net/wireless/rtlwifi/rtl8192cu/ |
D | rf.c | 48 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl92cu_phy_rf6052_set_bandwidth() 54 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl92cu_phy_rf6052_set_bandwidth() 86 tx_agc[RF90_PATH_A] = 0x3f3f3f3f; in rtl92cu_phy_rf6052_set_cck_txpower() 89 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92cu_phy_rf6052_set_cck_txpower() 104 tx_agc[RF90_PATH_A] = 0x10101010; in rtl92cu_phy_rf6052_set_cck_txpower() 108 tx_agc[RF90_PATH_A] = 0x00000000; in rtl92cu_phy_rf6052_set_cck_txpower() 111 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92cu_phy_rf6052_set_cck_txpower() 120 tx_agc[RF90_PATH_A] += tmpval; in rtl92cu_phy_rf6052_set_cck_txpower() 127 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92cu_phy_rf6052_set_cck_txpower() 135 tmpval = tx_agc[RF90_PATH_A] & 0xff; in rtl92cu_phy_rf6052_set_cck_txpower() [all …]
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D | phy.c | 291 case RF90_PATH_A: in rtl92cu_phy_config_rf_with_headerfile() 433 rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS); in _rtl92cu_phy_lc_calibrate() 437 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, in _rtl92cu_phy_lc_calibrate() 443 lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS); in _rtl92cu_phy_lc_calibrate() 444 rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, lc_cal | 0x08000); in _rtl92cu_phy_lc_calibrate() 448 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode); in _rtl92cu_phy_lc_calibrate()
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D | hw.c | 155 rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_A][i] = in _rtl92cu_read_txpower_info_from_hwpg() 226 if (rf_path == RF90_PATH_A) { in _rtl92cu_read_txpower_info_from_hwpg() 257 rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] = (tempval & 0xF); in _rtl92cu_read_txpower_info_from_hwpg() 260 if (rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] & BIT(3)) in _rtl92cu_read_txpower_info_from_hwpg() 261 rtlefuse->txpwr_ht20diff[RF90_PATH_A][i] |= 0xF0; in _rtl92cu_read_txpower_info_from_hwpg() 269 rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i] = (tempval & 0xF); in _rtl92cu_read_txpower_info_from_hwpg() 274 rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][7]; in _rtl92cu_read_txpower_info_from_hwpg() 278 i, rtlefuse->txpwr_ht20diff[RF90_PATH_A][i]); in _rtl92cu_read_txpower_info_from_hwpg() 282 i, rtlefuse->txpwr_legacyhtdiff[RF90_PATH_A][i]); in _rtl92cu_read_txpower_info_from_hwpg() 298 rtlefuse->eeprom_tssi[RF90_PATH_A] = hwinfo[EEPROM_TSSI_A]; in _rtl92cu_read_txpower_info_from_hwpg() [all …]
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/drivers/net/wireless/rtlwifi/rtl8192c/ |
D | phy_common.c | 117 if (rfpath == RF90_PATH_A) in _rtl92c_phy_rf_serial_read() 131 if (rfpath == RF90_PATH_A) in _rtl92c_phy_rf_serial_read() 337 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition() 342 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition() 347 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in _rtl92c_phy_init_bb_rf_register_definition() 350 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in _rtl92c_phy_init_bb_rf_register_definition() 353 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92c_phy_init_bb_rf_register_definition() 358 rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER; in _rtl92c_phy_init_bb_rf_register_definition() 363 rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92c_phy_init_bb_rf_register_definition() 368 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1; in _rtl92c_phy_init_bb_rf_register_definition() [all …]
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/drivers/net/wireless/rtlwifi/rtl8188ee/ |
D | rf.c | 46 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl88e_phy_rf6052_set_bandwidth() 52 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl88e_phy_rf6052_set_bandwidth() 80 tx_agc[RF90_PATH_A] = 0x3f3f3f3f; in rtl88e_phy_rf6052_set_cck_txpower() 84 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl88e_phy_rf6052_set_cck_txpower() 92 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl88e_phy_rf6052_set_cck_txpower() 101 tx_agc[RF90_PATH_A] += tmpval; in rtl88e_phy_rf6052_set_cck_txpower() 109 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl88e_phy_rf6052_set_cck_txpower() 125 tmpval = tx_agc[RF90_PATH_A] & 0xff; in rtl88e_phy_rf6052_set_cck_txpower() 132 tmpval = tx_agc[RF90_PATH_A] >> 8; in rtl88e_phy_rf6052_set_cck_txpower() 393 case RF90_PATH_A: in rf6052_conf_para() [all …]
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D | dm.c | 189 case RF90_PATH_A: in rtl88e_set_iqk_matrix() 212 case RF90_PATH_A: in rtl88e_set_iqk_matrix() 239 u8 ofdm_val = rtlpriv->dm.swing_idx_ofdm[RF90_PATH_A]; in rtl88e_dm_txpower_track_adjust() 296 if (rfpath == RF90_PATH_A) { in rtl88e_chk_tx_track() 902 thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xfc00); in rtl88e_dm_txpower_tracking_callback_thermalmeter() 1068 rtldm->swing_idx_ofdm[RF90_PATH_A] = in rtl88e_dm_txpower_tracking_callback_thermalmeter() 1069 (u8)ofdm_index[RF90_PATH_A]; in rtl88e_dm_txpower_tracking_callback_thermalmeter() 1115 rtlpriv->dm.swing_idx_ofdm[RF90_PATH_A] = 12; in rtl88e_dm_init_txpower_tracking() 1132 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17)|BIT(16), in rtl88e_dm_check_txpower_tracking()
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D | phy.c | 57 int jj = RF90_PATH_A; in rf_serial_read() 228 int jj = RF90_PATH_A; in rtl88e_phy_init_bb_rf_register_definition() 701 _rtl8188e_config_rf_reg(hw, addr, data, RF90_PATH_A, in rtl88_config_s() 972 case RF90_PATH_A: in rtl88e_phy_config_rf_with_headerfile() 1077 int jj = RF90_PATH_A; in _rtl88e_get_txpower_index() 1373 int jj = RF90_PATH_A; in _rtl88e_phy_path_a_rx_iqk() 1787 int jj = RF90_PATH_A; in _rtl88e_phy_lc_calibrate() 2062 int jj = RF90_PATH_A; in _rtl88ee_phy_set_rf_sleep()
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/drivers/net/wireless/rtlwifi/rtl8192ce/ |
D | rf.c | 48 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl92ce_phy_rf6052_set_bandwidth() 54 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl92ce_phy_rf6052_set_bandwidth() 80 tx_agc[RF90_PATH_A] = 0x3f3f3f3f; in rtl92ce_phy_rf6052_set_cck_txpower() 84 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92ce_phy_rf6052_set_cck_txpower() 92 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92ce_phy_rf6052_set_cck_txpower() 102 tx_agc[RF90_PATH_A] += tmpval; in rtl92ce_phy_rf6052_set_cck_txpower() 110 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92ce_phy_rf6052_set_cck_txpower() 119 tmpval = tx_agc[RF90_PATH_A] & 0xff; in rtl92ce_phy_rf6052_set_cck_txpower() 126 tmpval = tx_agc[RF90_PATH_A] >> 8; in rtl92ce_phy_rf6052_set_cck_txpower() 446 case RF90_PATH_A: in _rtl92ce_phy_rf6052_config_parafile() [all …]
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D | phy.c | 306 case RF90_PATH_A: in rtl92c_phy_config_rf_with_headerfile() 444 rf_a_mode = rtl_get_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS); in _rtl92ce_phy_lc_calibrate() 450 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, in _rtl92ce_phy_lc_calibrate() 457 lc_cal = rtl_get_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS); in _rtl92ce_phy_lc_calibrate() 459 rtl_set_rfreg(hw, RF90_PATH_A, 0x18, MASK12BITS, lc_cal | 0x08000); in _rtl92ce_phy_lc_calibrate() 465 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, MASK12BITS, rf_a_mode); in _rtl92ce_phy_lc_calibrate() 482 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); in _rtl92ce_phy_set_rf_sleep() 484 u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); in _rtl92ce_phy_set_rf_sleep() 487 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); in _rtl92ce_phy_set_rf_sleep() 489 u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); in _rtl92ce_phy_set_rf_sleep()
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D | hw.c | 972 rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1, MASKDWORD, 0x30255); in rtl92ce_hw_init() 973 rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G2, MASKDWORD, 0x50a00); in rtl92ce_hw_init() 975 rtl_set_rfreg(hw, RF90_PATH_A, 0x0C, MASKDWORD, 0x894AE); in rtl92ce_hw_init() 976 rtl_set_rfreg(hw, RF90_PATH_A, 0x0A, MASKDWORD, 0x1AF31); in rtl92ce_hw_init() 977 rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, MASKDWORD, 0x8F425); in rtl92ce_hw_init() 978 rtl_set_rfreg(hw, RF90_PATH_A, RF_SYN_G2, MASKDWORD, 0x4F200); in rtl92ce_hw_init() 979 rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK1, MASKDWORD, 0x44053); in rtl92ce_hw_init() 980 rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK2, MASKDWORD, 0x80201); in rtl92ce_hw_init() 1017 rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05); in rtl92ce_hw_init() 1293 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); in _rtl92ce_poweroff_adapter() [all …]
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/drivers/net/wireless/rtlwifi/rtl8723ae/ |
D | rf.c | 46 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl8723ae_phy_rf6052_set_bandwidth() 52 rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK, in rtl8723ae_phy_rf6052_set_bandwidth() 78 tx_agc[RF90_PATH_A] = 0x3f3f3f3f; in rtl8723ae_phy_rf6052_set_cck_txpower() 82 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl8723ae_phy_rf6052_set_cck_txpower() 90 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl8723ae_phy_rf6052_set_cck_txpower() 100 tx_agc[RF90_PATH_A] += tmpval; in rtl8723ae_phy_rf6052_set_cck_txpower() 108 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl8723ae_phy_rf6052_set_cck_txpower() 117 tmpval = tx_agc[RF90_PATH_A] & 0xff; in rtl8723ae_phy_rf6052_set_cck_txpower() 124 tmpval = tx_agc[RF90_PATH_A] >> 8; in rtl8723ae_phy_rf6052_set_cck_txpower() 433 case RF90_PATH_A: in _rtl8723ae_phy_rf6052_config_parafile() [all …]
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D | phy.c | 218 if (rfpath == RF90_PATH_A) in _phy_rf_serial_read() 232 if (rfpath == RF90_PATH_A) in _phy_rf_serial_read() 624 case RF90_PATH_A: in rtl8723ae_phy_config_rf_with_headerfile() 698 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _phy_init_bb_rf_reg_def() 703 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _phy_init_bb_rf_reg_def() 708 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in _phy_init_bb_rf_reg_def() 711 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in _phy_init_bb_rf_reg_def() 714 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _phy_init_bb_rf_reg_def() 719 rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = rFPGA0_XAB_RFPARAMETER; in _phy_init_bb_rf_reg_def() 724 rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _phy_init_bb_rf_reg_def() [all …]
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D | hal_bt_coexist.c | 412 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 414 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 416 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 418 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 420 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 431 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 433 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 435 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 437 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table() 439 rtl8723ae_phy_set_rf_reg(hw, RF90_PATH_A, in rtl8723ae_dm_bt_agc_table()
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D | hw.c | 919 rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1, MASKDWORD, 0x30255); in rtl8723ae_hw_init() 920 rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G2, MASKDWORD, 0x50a00); in rtl8723ae_hw_init() 922 rtl_set_rfreg(hw, RF90_PATH_A, 0x0C, MASKDWORD, 0x894AE); in rtl8723ae_hw_init() 923 rtl_set_rfreg(hw, RF90_PATH_A, 0x0A, MASKDWORD, 0x1AF31); in rtl8723ae_hw_init() 924 rtl_set_rfreg(hw, RF90_PATH_A, RF_IPA, MASKDWORD, 0x8F425); in rtl8723ae_hw_init() 925 rtl_set_rfreg(hw, RF90_PATH_A, RF_SYN_G2, MASKDWORD, 0x4F200); in rtl8723ae_hw_init() 926 rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK1, MASKDWORD, 0x44053); in rtl8723ae_hw_init() 927 rtl_set_rfreg(hw, RF90_PATH_A, RF_RCK2, MASKDWORD, 0x80201); in rtl8723ae_hw_init() 962 rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05); in rtl8723ae_hw_init() 1365 rtlefuse->eprom_chnl_txpwr_ht40_2sdf[RF90_PATH_A][i] = in _rtl8723ae_read_txpower_info_from_hwpg() [all …]
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/drivers/net/wireless/rtlwifi/rtl8192de/ |
D | rf.c | 91 tx_agc[RF90_PATH_A] = 0x3f3f3f3f; in rtl92d_phy_rf6052_set_cck_txpower() 94 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92d_phy_rf6052_set_cck_txpower() 102 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92d_phy_rf6052_set_cck_txpower() 111 tx_agc[RF90_PATH_A] += tmpval; in rtl92d_phy_rf6052_set_cck_txpower() 118 for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { in rtl92d_phy_rf6052_set_cck_txpower() 127 tmpval = tx_agc[RF90_PATH_A] & 0xff; in rtl92d_phy_rf6052_set_cck_txpower() 132 tmpval = tx_agc[RF90_PATH_A] >> 8; in rtl92d_phy_rf6052_set_cck_txpower() 521 if (rfpath == RF90_PATH_A) { in rtl92d_phy_rf6052_config() 527 rfpath = RF90_PATH_A; in rtl92d_phy_rf6052_config() 533 if (rfpath == RF90_PATH_A) in rtl92d_phy_rf6052_config() [all …]
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D | phy.c | 279 if (rfpath == RF90_PATH_A) in _rtl92d_phy_rf_serial_read() 294 if (rfpath == RF90_PATH_A) in _rtl92d_phy_rf_serial_read() 413 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition() 423 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition() 433 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in _rtl92d_phy_init_bb_rf_register_definition() 439 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in _rtl92d_phy_init_bb_rf_register_definition() 445 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in _rtl92d_phy_init_bb_rf_register_definition() 452 rtlphy->phyreg_def[RF90_PATH_A].rflssi_select = RFPGA0_XAB_RFPARAMETER; in _rtl92d_phy_init_bb_rf_register_definition() 459 rtlphy->phyreg_def[RF90_PATH_A].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92d_phy_init_bb_rf_register_definition() 469 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para1 = RFPGA0_XA_HSSIPARAMETER1; in _rtl92d_phy_init_bb_rf_register_definition() [all …]
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/drivers/staging/rtl8192u/ |
D | r819xU_phy.c | 69 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B) in rtl8192_phy_CheckIsLegalRFPath() 582 …priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x… in rtl8192_InitBBRFRegDef() 588 …priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x… in rtl8192_InitBBRFRegDef() 594 …priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef() 600 …priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef() 606 priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter in rtl8192_InitBBRFRegDef() 612 priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select in rtl8192_InitBBRFRegDef() 618 priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage in rtl8192_InitBBRFRegDef() 624 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 in rtl8192_InitBBRFRegDef() 630 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 in rtl8192_InitBBRFRegDef() [all …]
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D | r8190_rtl8256.c | 125 for(eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) in phy_RF8256_Config_ParaFile() 138 case RF90_PATH_A: in phy_RF8256_Config_ParaFile() 173 case RF90_PATH_A: in phy_RF8256_Config_ParaFile() 214 case RF90_PATH_A: in phy_RF8256_Config_ParaFile()
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D | r819xU_phy.h | 45 RF90_PATH_A = 0, //Radio Path A enumerator
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/drivers/staging/rtl8192e/rtl8192e/ |
D | r8192E_phy.c | 73 if (eRFPath == RF90_PATH_A || eRFPath == RF90_PATH_B) in rtl8192_phy_CheckIsLegalRFPath() 407 priv->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in rtl8192_InitBBRFRegDef() 412 priv->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; in rtl8192_InitBBRFRegDef() 417 priv->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef() 422 priv->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in rtl8192_InitBBRFRegDef() 427 priv->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; in rtl8192_InitBBRFRegDef() 432 priv->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; in rtl8192_InitBBRFRegDef() 437 priv->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; in rtl8192_InitBBRFRegDef() 442 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; in rtl8192_InitBBRFRegDef() 447 priv->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in rtl8192_InitBBRFRegDef() [all …]
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D | r8190P_rtl8256.c | 108 for (eRFPath = (enum rf90_radio_path)RF90_PATH_A; in phy_RF8256_Config_ParaFile() 117 case RF90_PATH_A: in phy_RF8256_Config_ParaFile() 152 case RF90_PATH_A: in phy_RF8256_Config_ParaFile() 214 case RF90_PATH_A: in phy_RF8256_Config_ParaFile()
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D | r8192E_phy.h | 61 RF90_PATH_A = 0, enumerator
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