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Searched refs:RING_SPACE (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/nouveau/
Dnvc0_fbcon.c37 ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11); in nvc0_fbcon_fillrect()
72 ret = RING_SPACE(chan, 12); in nvc0_fbcon_copyarea()
106 ret = RING_SPACE(chan, 11); in nvc0_fbcon_imageblit()
134 ret = RING_SPACE(chan, push + 1); in nvc0_fbcon_imageblit()
192 ret = RING_SPACE(chan, 60); in nvc0_fbcon_accel_init()
Dnv50_fbcon.c37 ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11); in nv50_fbcon_fillrect()
72 ret = RING_SPACE(chan, 12); in nv50_fbcon_copyarea()
106 ret = RING_SPACE(chan, 11); in nv50_fbcon_imageblit()
134 ret = RING_SPACE(chan, push + 1); in nv50_fbcon_imageblit()
192 ret = RING_SPACE(chan, 59); in nv50_fbcon_accel_init()
Dnv04_fbcon.c39 ret = RING_SPACE(chan, 4); in nv04_fbcon_copyarea()
59 ret = RING_SPACE(chan, 7); in nv04_fbcon_fillrect()
94 ret = RING_SPACE(chan, 8); in nv04_fbcon_imageblit()
123 ret = RING_SPACE(chan, iter_len + 1); in nv04_fbcon_imageblit()
209 if (RING_SPACE(chan, 49)) { in nv04_fbcon_accel_init()
Dnouveau_bo.c578 int ret = RING_SPACE(chan, 2); in nve0_bo_move_init()
592 int ret = RING_SPACE(chan, 10); in nve0_bo_move_copy()
611 int ret = RING_SPACE(chan, 2); in nvc0_bo_move_init()
633 ret = RING_SPACE(chan, 11); in nvc0_bo_move_copy()
671 ret = RING_SPACE(chan, 12); in nvc0_bo_move_m2mf()
710 ret = RING_SPACE(chan, 11); in nva3_bo_move_copy()
739 int ret = RING_SPACE(chan, 7); in nv98_bo_move_exec()
757 int ret = RING_SPACE(chan, 7); in nv84_bo_move_exec()
773 int ret = RING_SPACE(chan, 6); in nv50_bo_move_init()
806 ret = RING_SPACE(chan, 8); in nv50_bo_move_m2mf()
[all …]
Dnvc0_fence.c40 int ret = RING_SPACE(chan, 6); in nvc0_fence_emit32()
56 int ret = RING_SPACE(chan, 5); in nvc0_fence_sync32()
Dnv17_fence.c48 ret = RING_SPACE(prev, 5); in nv17_fence_sync()
58 if (!ret && !(ret = RING_SPACE(chan, 5))) { in nv17_fence_sync()
Dnv04_fence.c43 int ret = RING_SPACE(chan, 2); in nv04_fence_emit()
Dnv84_fence.c47 int ret = RING_SPACE(chan, 8); in nv84_fence_emit32()
65 int ret = RING_SPACE(chan, 7); in nv84_fence_sync32()
Dnv10_fence.c36 int ret = RING_SPACE(chan, 2); in nv10_fence_emit()
Dnouveau_dma.h104 RING_SPACE(struct nouveau_channel *chan, int size) in RING_SPACE() function
Dnouveau_chan.c342 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS); in nouveau_channel_init()
365 ret = RING_SPACE(chan, 2); in nouveau_channel_init()
Dnouveau_gem.c748 ret = RING_SPACE(chan, req->nr_push * 2); in nouveau_gem_ioctl_pushbuf()
762 ret = RING_SPACE(chan, req->nr_push * (2 + NOUVEAU_DMA_SKIPS)); in nouveau_gem_ioctl_pushbuf()
Dnouveau_display.c528 ret = RING_SPACE(chan, 3); in nouveau_page_flip_emit()
Dnv50_display.c535 ret = RING_SPACE(chan, 8); in nv50_display_flip_next()
550 ret = RING_SPACE(chan, 12); in nv50_display_flip_next()
569 ret = RING_SPACE(chan, 10); in nv50_display_flip_next()