Searched refs:TEGRA_DIVIDER_FIXED (Results 1 – 5 of 5) sorted by relevance
| /drivers/clk/tegra/ |
| D | clk-divider.c | 133 if (divider->flags & TEGRA_DIVIDER_FIXED) in clk_frac_div_set_rate()
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| D | clk-tegra20.c | 605 TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
617 TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
629 TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
641 TEGRA_DIVIDER_FIXED | TEGRA_DIVIDER_ROUND_UP, in tegra20_pll_init()
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| D | clk-tegra30.c | 874 clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED | in tegra30_pll_init()
886 clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED | in tegra30_pll_init()
898 clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED | in tegra30_pll_init()
910 clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED | in tegra30_pll_init()
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| D | clk-tegra114.c | 1190 clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED | in tegra114_pll_init()
1201 clk_base + PLLP_OUTA, 0, TEGRA_DIVIDER_FIXED | in tegra114_pll_init()
1213 clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED | in tegra114_pll_init()
1224 clk_base + PLLP_OUTB, 0, TEGRA_DIVIDER_FIXED | in tegra114_pll_init()
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| D | clk.h | 78 #define TEGRA_DIVIDER_FIXED BIT(1) macro
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