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Searched refs:TU_SIZE_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h2654 #define TU_SIZE_MASK (0x3f << 25) macro
Dintel_display.c3109 I915_READ(PIPE_DATA_M1(pipe)) & TU_SIZE_MASK); in ironlake_pch_enable()