1 /*
2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on a lot of other RTC drivers.
11 *
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20 #include <linux/i2c.h>
21 #include <linux/bcd.h>
22 #include <linux/rtc.h>
23 #include <linux/delay.h>
24 #include <linux/module.h>
25
26 #define DRV_VERSION "1.0.8"
27
28 /* offsets into CCR area */
29
30 #define CCR_SEC 0
31 #define CCR_MIN 1
32 #define CCR_HOUR 2
33 #define CCR_MDAY 3
34 #define CCR_MONTH 4
35 #define CCR_YEAR 5
36 #define CCR_WDAY 6
37 #define CCR_Y2K 7
38
39 #define X1205_REG_SR 0x3F /* status register */
40 #define X1205_REG_Y2K 0x37
41 #define X1205_REG_DW 0x36
42 #define X1205_REG_YR 0x35
43 #define X1205_REG_MO 0x34
44 #define X1205_REG_DT 0x33
45 #define X1205_REG_HR 0x32
46 #define X1205_REG_MN 0x31
47 #define X1205_REG_SC 0x30
48 #define X1205_REG_DTR 0x13
49 #define X1205_REG_ATR 0x12
50 #define X1205_REG_INT 0x11
51 #define X1205_REG_0 0x10
52 #define X1205_REG_Y2K1 0x0F
53 #define X1205_REG_DWA1 0x0E
54 #define X1205_REG_YRA1 0x0D
55 #define X1205_REG_MOA1 0x0C
56 #define X1205_REG_DTA1 0x0B
57 #define X1205_REG_HRA1 0x0A
58 #define X1205_REG_MNA1 0x09
59 #define X1205_REG_SCA1 0x08
60 #define X1205_REG_Y2K0 0x07
61 #define X1205_REG_DWA0 0x06
62 #define X1205_REG_YRA0 0x05
63 #define X1205_REG_MOA0 0x04
64 #define X1205_REG_DTA0 0x03
65 #define X1205_REG_HRA0 0x02
66 #define X1205_REG_MNA0 0x01
67 #define X1205_REG_SCA0 0x00
68
69 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
70 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
71
72 #define X1205_SR_RTCF 0x01 /* Clock failure */
73 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
74 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
75 #define X1205_SR_AL0 0x20 /* Alarm 0 match */
76
77 #define X1205_DTR_DTR0 0x01
78 #define X1205_DTR_DTR1 0x02
79 #define X1205_DTR_DTR2 0x04
80
81 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
82
83 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
84
85 static struct i2c_driver x1205_driver;
86
87 /*
88 * In the routines that deal directly with the x1205 hardware, we use
89 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
90 * Epoch is initialized as 2000. Time is set to UTC.
91 */
x1205_get_datetime(struct i2c_client * client,struct rtc_time * tm,unsigned char reg_base)92 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
93 unsigned char reg_base)
94 {
95 unsigned char dt_addr[2] = { 0, reg_base };
96 unsigned char buf[8];
97 int i;
98
99 struct i2c_msg msgs[] = {
100 {/* setup read ptr */
101 .addr = client->addr,
102 .len = 2,
103 .buf = dt_addr
104 },
105 {/* read date */
106 .addr = client->addr,
107 .flags = I2C_M_RD,
108 .len = 8,
109 .buf = buf
110 },
111 };
112
113 /* read date registers */
114 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
115 dev_err(&client->dev, "%s: read error\n", __func__);
116 return -EIO;
117 }
118
119 dev_dbg(&client->dev,
120 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
121 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
122 __func__,
123 buf[0], buf[1], buf[2], buf[3],
124 buf[4], buf[5], buf[6], buf[7]);
125
126 /* Mask out the enable bits if these are alarm registers */
127 if (reg_base < X1205_CCR_BASE)
128 for (i = 0; i <= 4; i++)
129 buf[i] &= 0x7F;
130
131 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
132 tm->tm_min = bcd2bin(buf[CCR_MIN]);
133 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
134 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
135 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
136 tm->tm_year = bcd2bin(buf[CCR_YEAR])
137 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
138 tm->tm_wday = buf[CCR_WDAY];
139
140 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
141 "mday=%d, mon=%d, year=%d, wday=%d\n",
142 __func__,
143 tm->tm_sec, tm->tm_min, tm->tm_hour,
144 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
145
146 return 0;
147 }
148
x1205_get_status(struct i2c_client * client,unsigned char * sr)149 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
150 {
151 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
152
153 struct i2c_msg msgs[] = {
154 { /* setup read ptr */
155 .addr = client->addr,
156 .len = 2,
157 .buf = sr_addr
158 },
159 { /* read status */
160 .addr = client->addr,
161 .flags = I2C_M_RD,
162 .len = 1,
163 .buf = sr
164 },
165 };
166
167 /* read status register */
168 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
169 dev_err(&client->dev, "%s: read error\n", __func__);
170 return -EIO;
171 }
172
173 return 0;
174 }
175
x1205_set_datetime(struct i2c_client * client,struct rtc_time * tm,u8 reg_base,unsigned char alm_enable)176 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
177 u8 reg_base, unsigned char alm_enable)
178 {
179 int i, xfer;
180 unsigned char rdata[10] = { 0, reg_base };
181 unsigned char *buf = rdata + 2;
182
183 static const unsigned char wel[3] = { 0, X1205_REG_SR,
184 X1205_SR_WEL };
185
186 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
187 X1205_SR_WEL | X1205_SR_RWEL };
188
189 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
190
191 dev_dbg(&client->dev,
192 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
193 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
194 tm->tm_mon, tm->tm_year, tm->tm_wday);
195
196 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
197 buf[CCR_MIN] = bin2bcd(tm->tm_min);
198
199 /* set hour and 24hr bit */
200 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
201
202 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
203
204 /* month, 1 - 12 */
205 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
206
207 /* year, since the rtc epoch*/
208 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
209 buf[CCR_WDAY] = tm->tm_wday & 0x07;
210 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
211
212 /* If writing alarm registers, set compare bits on registers 0-4 */
213 if (reg_base < X1205_CCR_BASE)
214 for (i = 0; i <= 4; i++)
215 buf[i] |= 0x80;
216
217 /* this sequence is required to unlock the chip */
218 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
219 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
220 return -EIO;
221 }
222
223 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
224 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
225 return -EIO;
226 }
227
228 xfer = i2c_master_send(client, rdata, sizeof(rdata));
229 if (xfer != sizeof(rdata)) {
230 dev_err(&client->dev,
231 "%s: result=%d addr=%02x, data=%02x\n",
232 __func__,
233 xfer, rdata[1], rdata[2]);
234 return -EIO;
235 }
236
237 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
238 if (reg_base < X1205_CCR_BASE) {
239 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
240
241 msleep(10);
242
243 /* ...and set or clear the AL0E bit in the INT register */
244
245 /* Need to set RWEL again as the write has cleared it */
246 xfer = i2c_master_send(client, rwel, 3);
247 if (xfer != 3) {
248 dev_err(&client->dev,
249 "%s: aloe rwel - %d\n",
250 __func__,
251 xfer);
252 return -EIO;
253 }
254
255 if (alm_enable)
256 al0e[2] = X1205_INT_AL0E;
257
258 xfer = i2c_master_send(client, al0e, 3);
259 if (xfer != 3) {
260 dev_err(&client->dev,
261 "%s: al0e - %d\n",
262 __func__,
263 xfer);
264 return -EIO;
265 }
266
267 /* and wait 10msec again for this write to complete */
268 msleep(10);
269 }
270
271 /* disable further writes */
272 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
273 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
274 return -EIO;
275 }
276
277 return 0;
278 }
279
x1205_fix_osc(struct i2c_client * client)280 static int x1205_fix_osc(struct i2c_client *client)
281 {
282 int err;
283 struct rtc_time tm;
284
285 memset(&tm, 0, sizeof(tm));
286
287 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
288 if (err < 0)
289 dev_err(&client->dev, "unable to restart the oscillator\n");
290
291 return err;
292 }
293
x1205_get_dtrim(struct i2c_client * client,int * trim)294 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
295 {
296 unsigned char dtr;
297 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
298
299 struct i2c_msg msgs[] = {
300 { /* setup read ptr */
301 .addr = client->addr,
302 .len = 2,
303 .buf = dtr_addr
304 },
305 { /* read dtr */
306 .addr = client->addr,
307 .flags = I2C_M_RD,
308 .len = 1,
309 .buf = &dtr
310 },
311 };
312
313 /* read dtr register */
314 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
315 dev_err(&client->dev, "%s: read error\n", __func__);
316 return -EIO;
317 }
318
319 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
320
321 *trim = 0;
322
323 if (dtr & X1205_DTR_DTR0)
324 *trim += 20;
325
326 if (dtr & X1205_DTR_DTR1)
327 *trim += 10;
328
329 if (dtr & X1205_DTR_DTR2)
330 *trim = -*trim;
331
332 return 0;
333 }
334
x1205_get_atrim(struct i2c_client * client,int * trim)335 static int x1205_get_atrim(struct i2c_client *client, int *trim)
336 {
337 s8 atr;
338 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
339
340 struct i2c_msg msgs[] = {
341 {/* setup read ptr */
342 .addr = client->addr,
343 .len = 2,
344 .buf = atr_addr
345 },
346 {/* read atr */
347 .addr = client->addr,
348 .flags = I2C_M_RD,
349 .len = 1,
350 .buf = &atr
351 },
352 };
353
354 /* read atr register */
355 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
356 dev_err(&client->dev, "%s: read error\n", __func__);
357 return -EIO;
358 }
359
360 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
361
362 /* atr is a two's complement value on 6 bits,
363 * perform sign extension. The formula is
364 * Catr = (atr * 0.25pF) + 11.00pF.
365 */
366 if (atr & 0x20)
367 atr |= 0xC0;
368
369 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
370
371 *trim = (atr * 250) + 11000;
372
373 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
374
375 return 0;
376 }
377
378 struct x1205_limit
379 {
380 unsigned char reg, mask, min, max;
381 };
382
x1205_validate_client(struct i2c_client * client)383 static int x1205_validate_client(struct i2c_client *client)
384 {
385 int i, xfer;
386
387 /* Probe array. We will read the register at the specified
388 * address and check if the given bits are zero.
389 */
390 static const unsigned char probe_zero_pattern[] = {
391 /* register, mask */
392 X1205_REG_SR, 0x18,
393 X1205_REG_DTR, 0xF8,
394 X1205_REG_ATR, 0xC0,
395 X1205_REG_INT, 0x18,
396 X1205_REG_0, 0xFF,
397 };
398
399 static const struct x1205_limit probe_limits_pattern[] = {
400 /* register, mask, min, max */
401 { X1205_REG_Y2K, 0xFF, 19, 20 },
402 { X1205_REG_DW, 0xFF, 0, 6 },
403 { X1205_REG_YR, 0xFF, 0, 99 },
404 { X1205_REG_MO, 0xFF, 0, 12 },
405 { X1205_REG_DT, 0xFF, 0, 31 },
406 { X1205_REG_HR, 0x7F, 0, 23 },
407 { X1205_REG_MN, 0xFF, 0, 59 },
408 { X1205_REG_SC, 0xFF, 0, 59 },
409 { X1205_REG_Y2K1, 0xFF, 19, 20 },
410 { X1205_REG_Y2K0, 0xFF, 19, 20 },
411 };
412
413 /* check that registers have bits a 0 where expected */
414 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
415 unsigned char buf;
416
417 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
418
419 struct i2c_msg msgs[2] = {
420 {
421 .addr = client->addr,
422 .len = 2,
423 .buf = addr
424 },
425 {
426 .addr = client->addr,
427 .flags = I2C_M_RD,
428 .len = 1,
429 .buf = &buf
430 },
431 };
432
433 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
434 dev_err(&client->dev,
435 "%s: could not read register %x\n",
436 __func__, probe_zero_pattern[i]);
437
438 return -EIO;
439 }
440
441 if ((buf & probe_zero_pattern[i+1]) != 0) {
442 dev_err(&client->dev,
443 "%s: register=%02x, zero pattern=%d, value=%x\n",
444 __func__, probe_zero_pattern[i], i, buf);
445
446 return -ENODEV;
447 }
448 }
449
450 /* check limits (only registers with bcd values) */
451 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
452 unsigned char reg, value;
453
454 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
455
456 struct i2c_msg msgs[2] = {
457 {
458 .addr = client->addr,
459 .len = 2,
460 .buf = addr
461 },
462 {
463 .addr = client->addr,
464 .flags = I2C_M_RD,
465 .len = 1,
466 .buf = ®
467 },
468 };
469
470 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
471 dev_err(&client->dev,
472 "%s: could not read register %x\n",
473 __func__, probe_limits_pattern[i].reg);
474
475 return -EIO;
476 }
477
478 value = bcd2bin(reg & probe_limits_pattern[i].mask);
479
480 if (value > probe_limits_pattern[i].max ||
481 value < probe_limits_pattern[i].min) {
482 dev_dbg(&client->dev,
483 "%s: register=%x, lim pattern=%d, value=%d\n",
484 __func__, probe_limits_pattern[i].reg,
485 i, value);
486
487 return -ENODEV;
488 }
489 }
490
491 return 0;
492 }
493
x1205_rtc_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)494 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
495 {
496 int err;
497 unsigned char intreg, status;
498 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
499 struct i2c_client *client = to_i2c_client(dev);
500 struct i2c_msg msgs[] = {
501 { /* setup read ptr */
502 .addr = client->addr,
503 .len = 2,
504 .buf = int_addr
505 },
506 {/* read INT register */
507
508 .addr = client->addr,
509 .flags = I2C_M_RD,
510 .len = 1,
511 .buf = &intreg
512 },
513 };
514
515 /* read interrupt register and status register */
516 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
517 dev_err(&client->dev, "%s: read error\n", __func__);
518 return -EIO;
519 }
520 err = x1205_get_status(client, &status);
521 if (err == 0) {
522 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
523 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
524 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
525 }
526 return err;
527 }
528
x1205_rtc_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)529 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
530 {
531 return x1205_set_datetime(to_i2c_client(dev),
532 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
533 }
534
x1205_rtc_read_time(struct device * dev,struct rtc_time * tm)535 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
536 {
537 return x1205_get_datetime(to_i2c_client(dev),
538 tm, X1205_CCR_BASE);
539 }
540
x1205_rtc_set_time(struct device * dev,struct rtc_time * tm)541 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
542 {
543 return x1205_set_datetime(to_i2c_client(dev),
544 tm, X1205_CCR_BASE, 0);
545 }
546
x1205_rtc_proc(struct device * dev,struct seq_file * seq)547 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
548 {
549 int err, dtrim, atrim;
550
551 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
552 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
553
554 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
555 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
556 atrim / 1000, atrim % 1000);
557 return 0;
558 }
559
560 static const struct rtc_class_ops x1205_rtc_ops = {
561 .proc = x1205_rtc_proc,
562 .read_time = x1205_rtc_read_time,
563 .set_time = x1205_rtc_set_time,
564 .read_alarm = x1205_rtc_read_alarm,
565 .set_alarm = x1205_rtc_set_alarm,
566 };
567
x1205_sysfs_show_atrim(struct device * dev,struct device_attribute * attr,char * buf)568 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
569 struct device_attribute *attr, char *buf)
570 {
571 int err, atrim;
572
573 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
574 if (err)
575 return err;
576
577 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
578 }
579 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
580
x1205_sysfs_show_dtrim(struct device * dev,struct device_attribute * attr,char * buf)581 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
582 struct device_attribute *attr, char *buf)
583 {
584 int err, dtrim;
585
586 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
587 if (err)
588 return err;
589
590 return sprintf(buf, "%d ppm\n", dtrim);
591 }
592 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
593
x1205_sysfs_register(struct device * dev)594 static int x1205_sysfs_register(struct device *dev)
595 {
596 int err;
597
598 err = device_create_file(dev, &dev_attr_atrim);
599 if (err)
600 return err;
601
602 err = device_create_file(dev, &dev_attr_dtrim);
603 if (err)
604 device_remove_file(dev, &dev_attr_atrim);
605
606 return err;
607 }
608
x1205_sysfs_unregister(struct device * dev)609 static void x1205_sysfs_unregister(struct device *dev)
610 {
611 device_remove_file(dev, &dev_attr_atrim);
612 device_remove_file(dev, &dev_attr_dtrim);
613 }
614
615
x1205_probe(struct i2c_client * client,const struct i2c_device_id * id)616 static int x1205_probe(struct i2c_client *client,
617 const struct i2c_device_id *id)
618 {
619 int err = 0;
620 unsigned char sr;
621 struct rtc_device *rtc;
622
623 dev_dbg(&client->dev, "%s\n", __func__);
624
625 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
626 return -ENODEV;
627
628 if (x1205_validate_client(client) < 0)
629 return -ENODEV;
630
631 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
632
633 rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
634 &x1205_rtc_ops, THIS_MODULE);
635
636 if (IS_ERR(rtc))
637 return PTR_ERR(rtc);
638
639 i2c_set_clientdata(client, rtc);
640
641 /* Check for power failures and eventually enable the osc */
642 if ((err = x1205_get_status(client, &sr)) == 0) {
643 if (sr & X1205_SR_RTCF) {
644 dev_err(&client->dev,
645 "power failure detected, "
646 "please set the clock\n");
647 udelay(50);
648 x1205_fix_osc(client);
649 }
650 }
651 else
652 dev_err(&client->dev, "couldn't read status\n");
653
654 err = x1205_sysfs_register(&client->dev);
655 if (err)
656 return err;
657
658 return 0;
659 }
660
x1205_remove(struct i2c_client * client)661 static int x1205_remove(struct i2c_client *client)
662 {
663 x1205_sysfs_unregister(&client->dev);
664 return 0;
665 }
666
667 static const struct i2c_device_id x1205_id[] = {
668 { "x1205", 0 },
669 { }
670 };
671 MODULE_DEVICE_TABLE(i2c, x1205_id);
672
673 static struct i2c_driver x1205_driver = {
674 .driver = {
675 .name = "rtc-x1205",
676 },
677 .probe = x1205_probe,
678 .remove = x1205_remove,
679 .id_table = x1205_id,
680 };
681
682 module_i2c_driver(x1205_driver);
683
684 MODULE_AUTHOR(
685 "Karen Spearel <kas111 at gmail dot com>, "
686 "Alessandro Zummo <a.zummo@towertech.it>");
687 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
688 MODULE_LICENSE("GPL");
689 MODULE_VERSION(DRV_VERSION);
690