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Searched refs:_MASKED_BIT_DISABLE (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_pm.c3663 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in gen6_init_clock_gating()
3725 I915_WRITE(GEN6_GT_MODE, _MASKED_BIT_DISABLE(0xffff)); in gen6_init_clock_gating()
4089 I915_WRITE(ECOSKPD, _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); in gen3_init_clock_gating()
4348 I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff)); in __gen6_gt_force_wake_mt_reset()
4412 I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in __gen6_gt_force_wake_mt_put()
4453 I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff)); in vlv_force_wake_reset()
4482 I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in vlv_force_wake_put()
4484 _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL)); in vlv_force_wake_put()
Dintel_ringbuffer.c529 _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) | in init_render_ring()
545 _MASKED_BIT_DISABLE(CM0_STC_EVICT_DISABLE_LRA_SNB)); in init_render_ring()
1546 _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE)); in gen6_bsd_ring_write_tail()
Di915_reg.h34 #define _MASKED_BIT_DISABLE(a) ((a) << 16) macro
Di915_irq.c1809 I915_WRITE(INSTPM, _MASKED_BIT_DISABLE(INSTPM_AGPBUSY_DIS)); in i915_enable_vblank()