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Searched refs:asT3LP_DDRSetting80MHz (Results 1 – 1 of 1) sorted by relevance

/drivers/staging/bcm/
DDDRInit.c479 static struct bcm_ddr_setting asT3LP_DDRSetting80MHz[]= {// # DPLL Clock Setting variable
790 psDDRSetting=asT3LP_DDRSetting80MHz; in ddr_init()
791 RegCount=(sizeof(asT3LP_DDRSetting80MHz)/ in ddr_init()
1117 psDDRSetting = asT3LP_DDRSetting80MHz; in download_ddr_settings()
1118 RegCount = ARRAY_SIZE(asT3LP_DDRSetting80MHz); in download_ddr_settings()