Searched refs:aux_clock_divider (Results 1 – 2 of 2) sorted by relevance
329 uint32_t aux_clock_divider; in intel_dp_aux_ch() local349 aux_clock_divider = intel_ddi_get_cdclk_freq(dev_priv) >> 1; in intel_dp_aux_ch()351 aux_clock_divider = 100; in intel_dp_aux_ch()353 aux_clock_divider = 200; /* SNB & IVB eDP input clock at 400Mhz */ in intel_dp_aux_ch()355 aux_clock_divider = 225; /* eDP input clock at 450Mhz */ in intel_dp_aux_ch()358 aux_clock_divider = 74; in intel_dp_aux_ch()360 aux_clock_divider = DIV_ROUND_UP(intel_pch_rawclk(dev), 2); in intel_dp_aux_ch()362 aux_clock_divider = intel_hrawclk(dev) / 2; in intel_dp_aux_ch()399 (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) | in intel_dp_aux_ch()
385 uint32_t aux_clock_divider; in cdv_intel_dp_aux_ch() local394 aux_clock_divider = 200 / 2; in cdv_intel_dp_aux_ch()419 (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) | in cdv_intel_dp_aux_ch()