Searched refs:cclk (Results 1 – 14 of 14) sorted by relevance
| /drivers/cpufreq/ |
| D | blackfin-cpufreq.c | 59 static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) in bfin_init_tables() argument
80 for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { in bfin_init_tables()
81 bfin_freq_table[index].frequency = cclk >> index; in bfin_init_tables()
202 unsigned long cclk, sclk; in __bfin_cpu_init() local
204 cclk = get_cclk() / 1000; in __bfin_cpu_init()
208 bfin_init_tables(cclk, sclk); in __bfin_cpu_init()
212 policy->cur = cclk; in __bfin_cpu_init()
|
| /drivers/net/ethernet/chelsio/cxgb4vf/ |
| D | t4vf_common.h | 144 u32 cclk; /* Core Clock (KHz) */ member
225 return adapter->params.vpd.cclk / 1000; in core_ticks_per_usec()
231 return (us * adapter->params.vpd.cclk) / 1000; in us_to_core_ticks()
237 return (ticks * 1000) / adapter->params.vpd.cclk; in core_ticks_to_us()
|
| D | t4vf_hw.c | 497 vpd_params->cclk = vals[0]; in t4vf_get_vpd_params()
|
| /drivers/scsi/csiostor/ |
| D | csio_hw.h | 311 uint32_t cclk; member
575 return (ticks * 1000 + hw->vpd.cclk/2) / hw->vpd.cclk; in csio_core_ticks_to_us()
581 return (us * hw->vpd.cclk) / 1000; in csio_us_to_core_ticks()
|
| D | csio_hw.c | 1505 hw->vpd.cclk = param[1]; in csio_get_device_params()
|
| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | cxgb4.h | 233 unsigned int cclk; member
844 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
850 return (us * adap->params.vpd.cclk) / 1000; in us_to_core_ticks()
857 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / in core_ticks_to_us()
858 adapter->params.vpd.cclk); in core_ticks_to_us()
|
| D | t4_hw.c | 663 p->cclk = cclk_val; in get_vpd_params()
3736 adapter->params.vpd.cclk = 50000; in t4_prep_adapter()
|
| /drivers/mmc/host/ |
| D | mmci.h | 183 unsigned int cclk; member
|
| D | mmci.c | 204 host->cclk = host->mclk; in mmci_set_clkreg()
215 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
224 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
675 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
|
| /drivers/clk/tegra/ |
| D | clk-tegra20.c | 241 osc, clk_32k, clk_m, sclk, cclk, hclk, pclk, blink, pll_a, pll_a_out0, enumerator
736 clks[cclk] = clk; in tegra20_super_clk_init()
1239 {cclk, clk_max, 0, 1},
1281 TEGRA_CLK_DUPLICATE(cclk, NULL, "cpu"),
|
| /drivers/net/ethernet/chelsio/cxgb3/ |
| D | common.h | 356 unsigned int cclk; member
635 return adap->params.vpd.cclk / 1000; in core_ticks_per_usec()
|
| D | t3_hw.c | 198 u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1; in mi1_init()
583 VPD_ENTRY(cclk, 6); /* core clock */
712 p->cclk = simple_strtoul(vpd.cclk_data, NULL, 10); in get_vpd_params()
3005 unsigned int clk = adap->params.vpd.cclk * 1000; in t3_config_sched()
3046 tp_set_timers(adap, adap->params.vpd.cclk * 1000); in tp_init()
3532 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); in early_hw_init()
|
| D | xgmac.c | 407 thres = (adap->params.vpd.cclk * 1000) / 15625; in t3_mac_set_mtu()
|
| D | cxgb3_main.c | 819 v = (adap->params.vpd.cclk * 1000) / cpt; in tm_attr_show()
|