Home
last modified time | relevance | path

Searched refs:ch_ctl (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_intel_dp.c380 uint32_t ch_ctl = output_reg + 0x10; in cdv_intel_dp_aux_ch() local
381 uint32_t ch_data = ch_ctl + 4; in cdv_intel_dp_aux_ch()
400 if (REG_READ(ch_ctl) & DP_AUX_CH_CTL_SEND_BUSY) { in cdv_intel_dp_aux_ch()
402 REG_READ(ch_ctl)); in cdv_intel_dp_aux_ch()
414 REG_WRITE(ch_ctl, in cdv_intel_dp_aux_ch()
424 status = REG_READ(ch_ctl); in cdv_intel_dp_aux_ch()
431 REG_WRITE(ch_ctl, in cdv_intel_dp_aux_ch()
/drivers/gpu/drm/i915/
Dintel_dp.c299 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_wait_done() local
303 #define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) in intel_dp_aux_wait_done()
325 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_ch() local
326 uint32_t ch_data = ch_ctl + 4; in intel_dp_aux_ch()
372 status = I915_READ_NOTRACE(ch_ctl); in intel_dp_aux_ch()
380 I915_READ(ch_ctl)); in intel_dp_aux_ch()
393 I915_WRITE(ch_ctl, in intel_dp_aux_ch()
407 I915_WRITE(ch_ctl, in intel_dp_aux_ch()