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Searched refs:dmactrl (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/host1x/hw/
Ddebug_hw.c191 u32 dmaput, dmaget, dmactrl; in host1x_debug_show_channel_cdma() local
197 dmactrl = host1x_ch_readl(ch, HOST1X_CHANNEL_DMACTRL); in host1x_debug_show_channel_cdma()
203 if (HOST1X_CHANNEL_DMACTRL_DMASTOP_V(dmactrl) || in host1x_debug_show_channel_cdma()
233 dmaput, dmaget, dmactrl); in host1x_debug_show_channel_cdma()
/drivers/isdn/hardware/mISDN/
Dnetjet.c93 u8 dmactrl; member
226 card->dmactrl = 0; in mode_tiger()
227 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
244 if (!card->dmactrl) { in mode_tiger()
245 card->dmactrl = 1; in mode_tiger()
246 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
260 if (!card->dmactrl) { in mode_tiger()
261 card->dmactrl = 1; in mode_tiger()
262 outb(card->dmactrl, card->base + NJ_DMACTRL); in mode_tiger()
302 card->dmactrl = 0; in nj_reset()
/drivers/isdn/hisax/
Dnj_u.c94 cs->hw.njet.dmactrl = 0; in reset_netjet_u()
165 cs->hw.njet.dmactrl = 0; in nju_cs_init()
Dnj_s.c115 cs->hw.njet.dmactrl = 0; in reset_netjet_s()
204 cs->hw.njet.dmactrl = 0; in njs_cs_init()
Denternow_pci.c165 cs->hw.njet.dmactrl = 0; in reset_enpci()
344 cs->hw.njet.dmactrl = 0; in en_cs_init()
Dnetjet.c107 cs->hw.njet.dmactrl = 0; in mode_tiger()
109 cs->hw.njet.dmactrl); in mode_tiger()
134 if (!cs->hw.njet.dmactrl) { in mode_tiger()
137 cs->hw.njet.dmactrl = 1; in mode_tiger()
139 cs->hw.njet.dmactrl); in mode_tiger()
Dhisax.h679 unsigned char dmactrl; member
/drivers/dma/ioat/
Ddma.c1078 u32 dmactrl; in ioat1_intr_quirk() local
1080 pci_read_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, &dmactrl); in ioat1_intr_quirk()
1082 dmactrl |= IOAT_PCI_DMACTRL_MSI_EN; in ioat1_intr_quirk()
1084 dmactrl &= ~IOAT_PCI_DMACTRL_MSI_EN; in ioat1_intr_quirk()
1085 pci_write_config_dword(pdev, IOAT_PCI_DMACTRL_OFFSET, dmactrl); in ioat1_intr_quirk()
/drivers/net/ethernet/freescale/
Dgianfar.c1627 tempval = gfar_read(&regs->dmactrl); in gfar_halt_nodisable()
1633 gfar_write(&regs->dmactrl, tempval); in gfar_halt_nodisable()
1799 tempval = gfar_read(&regs->dmactrl); in gfar_start()
1801 gfar_write(&regs->dmactrl, tempval); in gfar_start()
1804 tempval = gfar_read(&regs->dmactrl); in gfar_start()
1806 gfar_write(&regs->dmactrl, tempval); in gfar_start()
Dgianfar.h665 u32 dmactrl; /* 0x.02c - DMA Control Register */ member