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Searched refs:dw (Results 1 – 25 of 64) sorted by relevance

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/drivers/dma/
Ddw_dmac.c56 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_set_masters() local
58 unsigned char mmax = dw->nr_masters - 1; in dwc_set_masters()
155 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
168 BUG_ON(!dws->dma_dev || dws->dma_dev != dw->dma.dev); in dwc_initialize()
183 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
184 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
217 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
219 channel_clear_bit(dw, CH_EN, dwc->mask); in dwc_chan_disable()
220 while (dma_readl(dw, CH_EN) & dwc->mask) in dwc_chan_disable()
230 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_do_single_block() local
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Ddw_dmac_regs.h257 static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw) in __dw_regs() argument
259 return dw->regs; in __dw_regs()
262 #define dma_readl(dw, name) \ argument
263 dma_readl_native(&(__dw_regs(dw)->name))
264 #define dma_writel(dw, name, val) \ argument
265 dma_writel_native((val), &(__dw_regs(dw)->name))
267 #define channel_set_bit(dw, reg, mask) \ argument
268 dma_writel(dw, reg, ((mask) << 8) | (mask))
269 #define channel_clear_bit(dw, reg, mask) \ argument
270 dma_writel(dw, reg, ((mask) << 8) | 0)
/drivers/edac/
Di5100_edac.c489 u32 dw; in i5100_read_log() local
499 pci_read_config_dword(pdev, I5100_VALIDLOG, &dw); in i5100_read_log()
501 if (i5100_validlog_redmemvalid(dw)) { in i5100_read_log()
508 if (i5100_validlog_recmemvalid(dw)) { in i5100_read_log()
530 if (i5100_validlog_nrecmemvalid(dw)) { in i5100_read_log()
552 pci_write_config_dword(pdev, I5100_VALIDLOG, dw); in i5100_read_log()
558 u32 dw, dw2; in i5100_check_error() local
560 pci_read_config_dword(priv->mc, I5100_FERR_NF_MEM, &dw); in i5100_check_error()
561 if (i5100_ferr_nf_mem_any(dw)) { in i5100_check_error()
565 i5100_read_log(mci, i5100_ferr_nf_mem_chan_indx(dw), in i5100_check_error()
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/drivers/staging/wlags49_h2/
Dhcf.h107 #define CNV_END_LONG(dw) (hcf_32)( (dw >> 24) | ((dw >> 8) & 0xff00) | ((dw << 8) & 0xff0000) | (d… argument
113 #define CNV_LITTLE_TO_LONG(dw) CNV_END_LONG(dw) argument
114 #define CNV_LONG_TO_LITTLE(dw) CNV_END_LONG(dw) argument
119 #define CNV_LITTLE_TO_LONG(dw) (dw) argument
120 #define CNV_LONG_TO_LITTLE(dw) (dw) argument
/drivers/scsi/be2iscsi/
Dbe.h151 u32 *dw = (u32 *) ptr + dw_offset; in amap_set() local
152 *dw &= ~(mask << offset); in amap_set()
153 *dw |= (mask & value) << offset; in amap_set()
165 u32 *dw = ptr; in amap_get() local
166 return mask & (*(dw + dw_offset) >> offset); in amap_get()
180 u32 *dw = wrb; in swap_dws() local
183 *dw = cpu_to_le32(*dw); in swap_dws()
184 dw++; in swap_dws()
Dbe_mgmt.c1351 params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1358 params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1361 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1364 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1367 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1370 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1373 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1377 (params->dw[offsetof(struct amap_beiscsi_offload_params, in beiscsi_offload_cxn_v0()
1383 max_burst_length, pwrb, params->dw[offsetof in beiscsi_offload_cxn_v0()
1415 max_burst_length, pwrb, params->dw[offsetof in beiscsi_offload_cxn_v2()
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Dbe_main.h388 u32 dw[12]; member
459 u32 dw[4]; member
477 u32 dw[5]; member
583 u32 dw[4]; member
626 u32 dw[1]; member
642 u32 dw[1]; member
661 u32 dw[16]; member
669 (pwrb->dw[0] |= (wrb_type << type_offset))
770 u32 dw[12]; member
800 u32 dw[16]; member
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/drivers/ata/
Dsata_sx4.c322 unsigned int dw = PDC_DIMM_APKT_PRD >> 2; in pdc20621_ata_sg() local
329 buf32[dw] = cpu_to_le32(addr); in pdc20621_ata_sg()
330 buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); in pdc20621_ata_sg()
336 buf32[dw], buf32[dw + 1]); in pdc20621_ata_sg()
343 unsigned int dw = PDC_DIMM_HPKT_PRD >> 2; in pdc20621_host_sg() local
350 buf32[dw] = cpu_to_le32(addr); in pdc20621_host_sg()
351 buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); in pdc20621_host_sg()
357 buf32[dw], buf32[dw + 1]); in pdc20621_host_sg()
364 unsigned int i, dw; in pdc20621_ata_pkt() local
389 dw = i >> 2; in pdc20621_ata_pkt()
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/drivers/spi/
DMakefile26 obj-$(CONFIG_SPI_DESIGNWARE) += spi-dw.o
27 obj-$(CONFIG_SPI_DW_MMIO) += spi-dw-mmio.o
28 obj-$(CONFIG_SPI_DW_PCI) += spi-dw-midpci.o
29 spi-dw-midpci-objs := spi-dw-pci.o spi-dw-mid.o
/drivers/scsi/
Dncr53c8xx.h363 #define cpu_to_scr(dw) cpu_to_le32(dw) argument
364 #define scr_to_cpu(dw) le32_to_cpu(dw) argument
368 #define cpu_to_scr(dw) cpu_to_be32(dw) argument
369 #define scr_to_cpu(dw) be32_to_cpu(dw) argument
373 #define cpu_to_scr(dw) (dw) argument
374 #define scr_to_cpu(dw) (dw) argument
/drivers/scsi/sym53c8xx_2/
Dsym_glue.h141 #define cpu_to_scr(dw) cpu_to_le32(dw) argument
142 #define scr_to_cpu(dw) le32_to_cpu(dw) argument
/drivers/video/omap2/dss/
Doverlay.c159 u16 dw, dh; in dss_ovl_check() local
161 dw = mgr_timings->x_res; in dss_ovl_check()
179 if (dw < info->pos_x + outw) { in dss_ovl_check()
182 ovl->id, info->pos_x, outw, dw); in dss_ovl_check()
/drivers/net/ethernet/emulex/benet/
Dbe.h537 u32 *dw = (u32 *) ptr + dw_offset; in amap_set() local
538 *dw &= ~(mask << offset); in amap_set()
539 *dw |= (mask & value) << offset; in amap_set()
551 u32 *dw = (u32 *) ptr; in amap_get() local
552 return mask & (*(dw + dw_offset) >> offset); in amap_get()
566 u32 *dw = wrb; in swap_dws() local
569 *dw = cpu_to_le32(*dw); in swap_dws()
570 dw++; in swap_dws()
Dbe_hw.h303 u32 dw[4]; member
330 u32 dw[4]; member
411 u32 dw[4]; member
/drivers/xen/xen-pciback/
Dconf_space_header.c326 .u.dw.read = bar_read, \
327 .u.dw.write = bar_write, \
337 .u.dw.read = bar_read, \
338 .u.dw.write = rom_write, \
Dconf_space.c60 if (field->u.dw.read) in DEFINE_PCI_CONFIG()
61 ret = field->u.dw.read(dev, offset, value, entry->data); in DEFINE_PCI_CONFIG()
86 if (field->u.dw.write) in conf_space_write()
87 ret = field->u.dw.write(dev, offset, value, in conf_space_write()
Dconf_space_quirks.c78 field->u.dw.read = xen_pcibk_read_config_dword; in xen_pcibk_config_quirks_add_field()
79 field->u.dw.write = xen_pcibk_write_config_dword; in xen_pcibk_config_quirks_add_field()
Dconf_space_capability.c87 .u.dw.read = xen_pcibk_read_config_dword,
88 .u.dw.write = NULL,
/drivers/video/mb862xx/
Dmb862xxfbdrv.c331 if (l1_cfg->dh == 0 || l1_cfg->dw == 0) in mb862xxfb_ioctl()
333 if ((l1_cfg->sw >= l1_cfg->dw) && (l1_cfg->sh >= l1_cfg->dh)) { in mb862xxfb_ioctl()
337 (l1_cfg->sw << 11) / l1_cfg->dw)); in mb862xxfb_ioctl()
340 } else if ((l1_cfg->sw <= l1_cfg->dw) && in mb862xxfb_ioctl()
345 (l1_cfg->sw << 11) / l1_cfg->dw)); in mb862xxfb_ioctl()
349 pack(l1_cfg->dw >> 1, l1_cfg->dh)); in mb862xxfb_ioctl()
357 l1em |= l1_cfg->dw * 2 - 8; in mb862xxfb_ioctl()
378 pack(l1_cfg->dh - 1, l1_cfg->dw)); in mb862xxfb_ioctl()
533 par->l1_cfg.dw = 720; in mb862xxfb_init_fbinfo()
/drivers/infiniband/hw/qib/
Dqib_sdma.c582 u32 dw; in qib_sdma_verbs_send() local
591 dw = (len + 3) >> 2; in qib_sdma_verbs_send()
593 dw << 2, DMA_TO_DEVICE); in qib_sdma_verbs_send()
597 make_sdma_desc(ppd, sdmadesc, (u64) addr, dw, dwoffset); in qib_sdma_verbs_send()
629 dwoffset += dw; in qib_sdma_verbs_send()
630 dwords -= dw; in qib_sdma_verbs_send()
/drivers/infiniband/hw/ipath/
Dipath_sdma.c731 u32 dw; in ipath_sdma_verbs_send() local
740 dw = (len + 3) >> 2; in ipath_sdma_verbs_send()
741 addr = dma_map_single(&dd->pcidev->dev, sge->vaddr, dw << 2, in ipath_sdma_verbs_send()
745 make_sdma_desc(dd, sdmadesc, (u64) addr, dw, dwoffset); in ipath_sdma_verbs_send()
777 dwoffset += dw; in ipath_sdma_verbs_send()
778 dwords -= dw; in ipath_sdma_verbs_send()
/drivers/infiniband/hw/ehca/
Dehca_classes_pSeries.h120 u64 dw[2]; member
138 u64 dw[2]; member
/drivers/media/platform/soc_camera/
Dmx3_camera.c992 u32 dw, sens_conf; in mx3_camera_set_bus_param() local
1108 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; in mx3_camera_set_bus_param()
1111 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; in mx3_camera_set_bus_param()
1114 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; in mx3_camera_set_bus_param()
1122 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; in mx3_camera_set_bus_param()
1125 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF); in mx3_camera_set_bus_param()
1127 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw); in mx3_camera_set_bus_param()
/drivers/input/touchscreen/
Dpcap_ts.c91 struct delayed_work *dw = container_of(work, struct delayed_work, work); in pcap_ts_work() local
92 struct pcap_ts *pcap_ts = container_of(dw, struct pcap_ts, work); in pcap_ts_work()
/drivers/video/omap2/displays/
Dpanel-n8x0.c522 u16 dw, dh; in n8x0_panel_update() local
526 dw = dssdev->panel.timings.x_res; in n8x0_panel_update()
529 if (x != 0 || y != 0 || w != dw || h != dh) { in n8x0_panel_update()

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