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Searched refs:e_dbg (Results 1 – 13 of 13) sorted by relevance

/drivers/net/ethernet/intel/e1000/
De1000_hw.c118 e_dbg("e1000_set_phy_type"); in e1000_set_phy_type()
162 e_dbg("e1000_phy_init_script"); in e1000_phy_init_script()
256 e_dbg("e1000_set_mac_type"); in e1000_set_mac_type()
368 e_dbg("e1000_set_media_type"); in e1000_set_media_type()
418 e_dbg("e1000_reset_hw"); in e1000_reset_hw()
422 e_dbg("Disabling MWI on 82542 rev 2.0\n"); in e1000_reset_hw()
427 e_dbg("Masking off all interrupts\n"); in e1000_reset_hw()
460 e_dbg("Issuing a global reset to MAC\n"); in e1000_reset_hw()
536 e_dbg("Masking off all interrupts\n"); in e1000_reset_hw()
569 e_dbg("e1000_init_hw"); in e1000_init_hw()
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De1000.h329 #define e_dbg(format, arg...) \ macro
De1000_main.c4293 e_dbg("Receive packet consumed multiple buffers\n"); in e1000_clean_rx_irq()
/drivers/net/ethernet/intel/e1000e/
Dmac.c143 e_dbg("Programming MAC Address into RAR[0]\n"); in e1000e_init_rx_addrs()
148 e_dbg("Clearing RAR[1-%u]\n", rar_count - 1); in e1000e_init_rx_addrs()
183 e_dbg("NVM Read Error\n"); in e1000_check_alt_mac_addr_generic()
198 e_dbg("NVM Read Error\n"); in e1000_check_alt_mac_addr_generic()
208 e_dbg("Ignoring Alternate Mac Address with MC bit set\n"); in e1000_check_alt_mac_addr_generic()
465 e_dbg("Error configuring flow control\n"); in e1000e_check_for_copper_link()
503 e_dbg("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); in e1000e_check_for_fiber_link()
516 e_dbg("Error configuring flow control\n"); in e1000e_check_for_fiber_link()
525 e_dbg("Rx'ing /C/, enable AutoNeg and stop forcing link.\n"); in e1000e_check_for_fiber_link()
566 e_dbg("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); in e1000e_check_for_serdes_link()
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Dphy.c149 e_dbg("PHY Address %d is out of range\n", offset); in e1000e_read_phy_reg_mdic()
174 e_dbg("MDI Read did not complete\n"); in e1000e_read_phy_reg_mdic()
178 e_dbg("MDI Error\n"); in e1000e_read_phy_reg_mdic()
182 e_dbg("MDI Read offset error - requested %d, returned %d\n", in e1000e_read_phy_reg_mdic()
212 e_dbg("PHY Address %d is out of range\n", offset); in e1000e_write_phy_reg_mdic()
238 e_dbg("MDI Write did not complete\n"); in e1000e_write_phy_reg_mdic()
242 e_dbg("MDI Error\n"); in e1000e_write_phy_reg_mdic()
246 e_dbg("MDI Write offset error - requested %d, returned %d\n", in e1000e_write_phy_reg_mdic()
323 e_dbg("Setting page 0x%x\n", page); in e1000_set_page_igp()
765 e_dbg("Error committing the PHY changes\n"); in e1000e_copper_link_setup_m88()
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Dnvm.c195 e_dbg("Could not acquire NVM grant\n"); in e1000e_acquire_nvm()
300 e_dbg("SPI NVM Status error\n"); in e1000_ready_nvm_eeprom()
328 e_dbg("nvm parameter(s) out of bounds\n"); in e1000e_read_nvm_eerd()
370 e_dbg("nvm parameter(s) out of bounds\n"); in e1000e_write_nvm_spi()
444 e_dbg("PBA string buffer was null\n"); in e1000_read_pba_string_generic()
450 e_dbg("NVM Read Error\n"); in e1000_read_pba_string_generic()
456 e_dbg("NVM Read Error\n"); in e1000_read_pba_string_generic()
465 e_dbg("NVM PBA number is not stored as string\n"); in e1000_read_pba_string_generic()
469 e_dbg("PBA string buffer too small\n"); in e1000_read_pba_string_generic()
501 e_dbg("NVM Read Error\n"); in e1000_read_pba_string_generic()
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D82571.c111 e_dbg("Error getting PHY ID\n"); in e1000_init_phy_params_82571()
137 e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id); in e1000_init_phy_params_82571()
328 e_dbg("Please update your 82571 Bootagent\n"); in e1000_init_mac_params_82571()
490 e_dbg("Driver can't access device - SMBI bit is set.\n"); in e1000_get_hw_semaphore_82571()
508 e_dbg("Driver can't access the NVM\n"); in e1000_get_hw_semaphore_82571()
558 e_dbg("Driver can't access the PHY\n"); in e1000_get_hw_semaphore_82573()
845 e_dbg("nvm parameter(s) out of bounds\n"); in e1000_write_nvm_eewr_82571()
885 e_dbg("MNG configuration cycle has not completed.\n"); in e1000_get_cfg_done_82571()
979 e_dbg("PCI-E Master disable polling has failed.\n"); in e1000_reset_hw_82571()
981 e_dbg("Masking off all interrupts\n"); in e1000_reset_hw_82571()
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Dich8lan.c245 e_dbg("Failed to initialize PHY flow\n"); in e1000_init_phy_workarounds_pchlan()
289 e_dbg("Required LANPHYPC toggle blocked by ME\n"); in e1000_init_phy_workarounds_pchlan()
293 e_dbg("Toggling LANPHYPC\n"); in e1000_init_phy_workarounds_pchlan()
463 e_dbg("Cannot determine PHY addr. Erroring out\n"); in e1000_init_phy_params_ich8lan()
531 e_dbg("ERROR: Flash registers not mapped\n"); in e1000_init_nvm_params_ich8lan()
872 e_dbg("max_frame_size not set.\n"); in e1000_platform_pm_pch_lpt()
878 e_dbg("Speed not set.\n"); in e1000_platform_pm_pch_lpt()
906 e_dbg("Invalid LTR latency scale %d\n", scale); in e1000_platform_pm_pch_lpt()
1078 e_dbg("Error configuring flow control\n"); in e1000_check_for_copper_link_ich8lan()
1177 e_dbg("contention for Phy access\n"); in e1000_acquire_swflag_ich8lan()
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D80003es2lan.c323 e_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n"); in e1000_acquire_swfw_sync_80003es2lan()
532 e_dbg("MNG configuration cycle has not completed.\n"); in e1000_get_cfg_done_80003es2lan()
564 e_dbg("GG82563 PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
582 e_dbg("Waiting for forced speed/duplex link on GG82563 phy.\n"); in e1000_phy_force_speed_duplex_80003es2lan()
699 e_dbg("PCI-E Master disable polling has failed.\n"); in e1000_reset_hw_80003es2lan()
701 e_dbg("Masking off all interrupts\n"); in e1000_reset_hw_80003es2lan()
716 e_dbg("Issuing a global reset to MAC\n"); in e1000_reset_hw_80003es2lan()
759 e_dbg("Error initializing identification LED\n"); in e1000_init_hw_80003es2lan()
762 e_dbg("Initializing the IEEE VLAN\n"); in e1000_init_hw_80003es2lan()
769 e_dbg("Zeroing the MTA\n"); in e1000_init_hw_80003es2lan()
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Dmanage.c69 e_dbg("ARC subsystem not valid.\n"); in e1000_mng_enable_host_if()
76 e_dbg("E1000_HOST_EN bit disabled.\n"); in e1000_mng_enable_host_if()
88 e_dbg("Previous command timeout failed .\n"); in e1000_mng_enable_host_if()
Dptp.c183 e_dbg("SYSTIM overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec); in e1000e_systim_overflow_work()
De1000.h54 #define e_dbg(format, arg...) \ macro
Dnetdev.c960 e_dbg("Receive packet consumed multiple buffers\n"); in e1000_clean_rx_irq()
1323 e_dbg("Packet Split buffers didn't pick up the full packet\n"); in e1000_clean_rx_irq_ps()
1339 e_dbg("Last part of the packet spanning multiple descriptors\n"); in e1000_clean_rx_irq_ps()
2991 e_dbg("failed to enable jumbo frame workaround mode\n"); in e1000_setup_rctl()
4129 e_dbg("icr is %08X\n", icr); in e1000_intr_msi_test()
4197 e_dbg("MSI interrupt test succeeded!\n"); in e1000_test_msi_interrupt()