Searched refs:gpio_mmio_base (Results 1 – 2 of 2) sorted by relevance
65 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); in intel_i2c_reset()66 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0); in intel_i2c_reset()192 bus->gpio_reg = dev_priv->gpio_mmio_base + gmbus_ports[pin - 1].reg; in intel_gpio_setup()219 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_wait_hw_status()256 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_wait_idle()282 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_read()314 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_write()364 int reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer_index_read()408 reg_offset = dev_priv->gpio_mmio_base; in gmbus_xfer()529 dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA; in intel_setup_gmbus()[all …]
907 uint32_t gpio_mmio_base; member