| /drivers/media/platform/omap3isp/ |
| D | isph3a_af.c | 77 paxstart = conf->paxel.h_start << AF_HZ_START_SHIFT; in h3a_af_setup_regs()
84 isp_reg_writel(af->isp, conf->iir.h_start, in h3a_af_setup_regs()
205 if ((paxel_cfg->h_start < iir_cfg->h_start) || in h3a_af_validate_params()
206 IS_OUT_OF_BOUNDS(paxel_cfg->h_start, in h3a_af_validate_params()
220 if (IS_OUT_OF_BOUNDS(iir_cfg->h_start, OMAP3ISP_AF_IIRSH_MIN, in h3a_af_validate_params()
270 if (cur_cfg->iir.h_start != user_cfg->iir.h_start) { in h3a_af_set_params()
290 (cur_cfg->paxel.h_start != user_cfg->paxel.h_start) || in h3a_af_set_params()
386 af_recover_cfg->paxel.h_start = OMAP3ISP_AF_PAXEL_HZSTART_MIN; in omap3isp_h3a_af_init()
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| D | isphist.c | 117 reg_hor[c] = (conf->region[c].h_start << in hist_setup_regs()
323 if (user_cfg->region[c].h_start & ~ISPHIST_REG_START_END_MASK) in hist_validate_params()
331 if (user_cfg->region[c].h_start > user_cfg->region[c].h_end) in hist_validate_params()
389 if (cur_cfg->region[c].h_start != user_cfg->region[c].h_start) in hist_comp_params()
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| /drivers/media/usb/sn9c102/ |
| D | sn9c102_pas202bcb.c | 177 u8 h_start = 0, in pas202bcb_set_crop() local
183 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4; in pas202bcb_set_crop()
186 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 3; in pas202bcb_set_crop()
192 err += sn9c102_write_reg(cam, h_start, 0x12); in pas202bcb_set_crop()
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| D | sn9c102_mi0360.c | 267 u8 h_start = 0, v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1; in mi0360_set_crop() local
271 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 0; in mi0360_set_crop()
275 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1; in mi0360_set_crop()
281 err += sn9c102_write_reg(cam, h_start, 0x12); in mi0360_set_crop()
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| D | sn9c102_tas5110d.c | 45 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 69, in tas5110d_set_crop() local
48 err += sn9c102_write_reg(cam, h_start, 0x12); in tas5110d_set_crop()
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| D | sn9c102_tas5110c1b.c | 63 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 69, in tas5110c1b_set_crop() local
66 err += sn9c102_write_reg(cam, h_start, 0x12); in tas5110c1b_set_crop()
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| D | sn9c102_tas5130d1b.c | 63 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 104, in tas5130d1b_set_crop() local
67 err += sn9c102_write_reg(cam, h_start, 0x12); in tas5130d1b_set_crop()
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| D | sn9c102_ov7630.c | 385 u8 h_start = 0, v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1; in ov7630_set_crop() local
391 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1; in ov7630_set_crop()
395 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4; in ov7630_set_crop()
401 err += sn9c102_write_reg(cam, h_start, 0x12); in ov7630_set_crop()
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| D | sn9c102_hv7131d.c | 124 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 2, in hv7131d_set_crop() local
127 err += sn9c102_write_reg(cam, h_start, 0x12); in hv7131d_set_crop()
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| D | sn9c102_hv7131r.c | 214 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1, in hv7131r_set_crop() local
217 err += sn9c102_write_reg(cam, h_start, 0x12); in hv7131r_set_crop()
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| D | sn9c102_pas106b.c | 143 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4, in pas106b_set_crop() local
146 err += sn9c102_write_reg(cam, h_start, 0x12); in pas106b_set_crop()
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| D | sn9c102_mi0343.c | 197 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 0, in mi0343_set_crop() local
200 err += sn9c102_write_reg(cam, h_start, 0x12); in mi0343_set_crop()
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| D | sn9c102_ov7660.c | 371 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1, in ov7660_set_crop() local
374 err += sn9c102_write_reg(cam, h_start, 0x12); in ov7660_set_crop()
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| D | sn9c102_core.c | 1605 u8 h_start = (u8)(rect->left - s->cropcap.bounds.left), in sn9c102_set_crop() local
1611 err += sn9c102_write_reg(cam, h_start, 0x12); in sn9c102_set_crop()
1619 "%u %u %u %u", h_start, v_start, h_size, v_size); in sn9c102_set_crop()
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| /drivers/video/ |
| D | wm8505fb.c | 90 int h_start = info->var.left_margin; in wm8505fb_set_timing() local
91 int h_end = h_start + info->var.xres; in wm8505fb_set_timing()
102 writel(h_start, fbi->regbase + WMT_GOVR_TIMING_H_START); in wm8505fb_set_timing()
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| D | bfin-lq035q1-fb.c | 108 u32 h_start; member
246 fbi->h_start = (7 * clocks_per_pix + cpld_pipeline_delay_cor); /* first valid pixel */ in bfin_lq035q1_calc_timing()
264 bfin_write_PPI_DELAY(fbi->h_start); in bfin_lq035q1_config_ppi()
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| /drivers/media/pci/saa7134/ |
| D | saa7134-vbi.c | 56 saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff); in task_init()
57 saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8); in task_init()
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| D | saa7134-video.c | 197 .h_start = 0, \
207 .h_start = 0, \
353 .h_start = 0,
547 dev->crop_bounds.left = norm->h_start; in set_tvnorm()
548 dev->crop_defrect.left = norm->h_start; in set_tvnorm()
549 dev->crop_bounds.width = norm->h_stop - norm->h_start +1; in set_tvnorm()
550 dev->crop_defrect.width = norm->h_stop - norm->h_start +1; in set_tvnorm()
701 int h_start, h_stop, v_start, v_stop; in set_size() local
705 h_start = dev->crop_current.left; in set_size()
710 saa_writeb(SAA7134_VIDEO_H_START1(task), h_start & 0xff); in set_size()
[all …]
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| D | saa7134.h | 92 unsigned int h_start; member
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| /drivers/video/nvidia/ |
| D | nvidia.c | 312 int h_start = (info->var.xres + info->var.right_margin) / 8 - 1; in nvidia_calc_regs() local
339 h_start = h_total - 5; in nvidia_calc_regs()
349 state->crtc[0x4] = Set8Bits(h_start); in nvidia_calc_regs()
386 | SetBitField(h_start, 8: 8, 3:3); in nvidia_calc_regs()
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