| /drivers/video/omap2/displays/ |
| D | panel-generic-dpi.c | 64 .hsw = 42,
91 .hsw = 2,
119 .hsw = 8,
146 .hsw = 41,
172 .hsw = 128,
199 .hsw = 40,
226 .hsw = 48,
253 .hsw = 3,
278 .hsw = 15,
303 .hsw = 48,
[all …]
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| D | panel-sharp-ls037v7dw01.c | 37 .hsw = 2,
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| D | panel-nec-nl8048hl11-01b.c | 71 .hsw = 1,
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| D | panel-lgphilips-lb035q02.c | 38 .hsw = 2,
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| D | panel-tfp410.c | 36 .hsw = 32,
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| /drivers/video/ |
| D | carminefb.c | 62 u32 hsw; member
105 .hsw = 96,
117 .hsw = 72,
370 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
380 hsw = par->res->hsw - 1; in set_display_parameters()
391 (hsw << CARMINE_DISP_HSW_SHIFT) | in set_display_parameters()
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| /drivers/gpu/drm/tilcdc/ |
| D | tilcdc_crtc.c | 241 uint32_t reg, hbp, hfp, hsw, vbp, vfp, vsw; in tilcdc_crtc_mode_set() local
280 hsw = mode->hsync_end - mode->hsync_start; in tilcdc_crtc_mode_set()
286 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); in tilcdc_crtc_mode_set()
295 reg |= (hsw & 0x3c0) << 21; in tilcdc_crtc_mode_set()
302 ((hsw & 0x3f) << 10); in tilcdc_crtc_mode_set()
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| /drivers/video/omap/ |
| D | hwa742.c | 792 int hsw, vsw; in setup_tearsync() local
798 hsw = hwa742_read_reg(HWA742_HS_W_REG); in setup_tearsync()
800 hs_pol_inv = !(hsw & 0x80); in setup_tearsync()
802 hsw = hsw & 0x7f; in setup_tearsync()
858 hs = hsw; in setup_tearsync()
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| D | lcd_htcherald.c | 71 .hsw = 10,
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| D | lcd_inn1510.c | 65 .hsw = 40,
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| D | lcd_palmte.c | 63 .hsw = 4,
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| D | lcd_palmz71.c | 64 .hsw = 4,
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| D | lcd_palmtt.c | 69 .hsw = 4,
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| D | lcd_osk.c | 86 .hsw = 40,
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| D | lcd_inn1610.c | 86 .hsw = 40,
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| D | lcd_h3.c | 80 .hsw = 12,
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| D | lcd_ams_delta.c | 153 .hsw = 3,
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| D | omapfb.h | 79 int hsw; /* Horizontal synchronization member
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| /drivers/gpu/drm/omapdrm/ |
| D | omap_connector.c | 44 mode->hsync_end = mode->hsync_start + timings->hsw; in copy_timings_omap_to_drm()
75 timings->hsw = mode->hsync_end - mode->hsync_start; in copy_timings_drm_to_omap()
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| /drivers/video/omap2/dss/ |
| D | display-sysfs.c | 109 t.x_res, t.hfp, t.hbp, t.hsw, in display_timings_show()
135 &t.x_res, &t.hfp, &t.hbp, &t.hsw, in display_timings_store()
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| D | dispc.c | 1998 nonactive = t->x_res + t->hfp + t->hsw + t->hbp - out_width; in check_horiz_timing_omap3()
2005 blank = div_u64((u64)(t->hbp + t->hsw + t->hfp) * lclk, pclk); in check_horiz_timing_omap3()
2831 static bool _dispc_lcd_timings_ok(int hsw, int hfp, int hbp, in _dispc_lcd_timings_ok() argument
2834 if (hsw < 1 || hsw > dispc.feat->sw_max || in _dispc_lcd_timings_ok()
2863 timings_ok &= _dispc_lcd_timings_ok(timings->hsw, timings->hfp, in dispc_mgr_timings_ok()
2871 static void _dispc_mgr_set_lcd_timings(enum omap_channel channel, int hsw, in _dispc_mgr_set_lcd_timings() argument
2883 timing_h = FLD_VAL(hsw-1, dispc.feat->sw_start, 0) | in _dispc_mgr_set_lcd_timings()
2948 _dispc_mgr_set_lcd_timings(channel, t.hsw, t.hfp, t.hbp, t.vsw, in dispc_mgr_set_timings()
2952 xtot = t.x_res + t.hfp + t.hsw + t.hbp; in dispc_mgr_set_timings()
2960 t.hsw, t.hfp, t.hbp, t.vsw, t.vfp, t.vbp); in dispc_mgr_set_timings()
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| D | venc_panel.c | 93 .hsw = 64, in venc_panel_probe()
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| D | ti_hdmi_4xxx_ip.c | 690 timings->hsw = 0; in hdmi_wp_init()
722 timings->hsw = param->timings.hsw; in hdmi_wp_video_init_format()
768 timing_h |= FLD_VAL(timings->hsw, 7, 0); in hdmi_wp_video_config_timing()
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| D | hdmi_panel.c | 49 .hsw = 96, in hdmi_panel_probe()
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| D | venc.c | 268 .hsw = 64,
283 .hsw = 64,
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