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Searched refs:intel_ring_emit (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_ringbuffer.c73 intel_ring_emit(ring, cmd); in gen2_render_ring_flush()
74 intel_ring_emit(ring, MI_NOOP); in gen2_render_ring_flush()
131 intel_ring_emit(ring, cmd); in gen4_render_ring_flush()
132 intel_ring_emit(ring, MI_NOOP); in gen4_render_ring_flush()
187 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5)); in intel_emit_post_sync_nonzero_flush()
188 intel_ring_emit(ring, PIPE_CONTROL_CS_STALL | in intel_emit_post_sync_nonzero_flush()
190 intel_ring_emit(ring, scratch_addr | PIPE_CONTROL_GLOBAL_GTT); /* address */ in intel_emit_post_sync_nonzero_flush()
191 intel_ring_emit(ring, 0); /* low dword */ in intel_emit_post_sync_nonzero_flush()
192 intel_ring_emit(ring, 0); /* high dword */ in intel_emit_post_sync_nonzero_flush()
193 intel_ring_emit(ring, MI_NOOP); in intel_emit_post_sync_nonzero_flush()
[all …]
Di915_gem_context.c329 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE); in mi_set_context()
331 intel_ring_emit(ring, MI_NOOP); in mi_set_context()
333 intel_ring_emit(ring, MI_NOOP); in mi_set_context()
334 intel_ring_emit(ring, MI_SET_CONTEXT); in mi_set_context()
335 intel_ring_emit(ring, new_context->obj->gtt_offset | in mi_set_context()
341 intel_ring_emit(ring, MI_NOOP); in mi_set_context()
344 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE); in mi_set_context()
346 intel_ring_emit(ring, MI_NOOP); in mi_set_context()
Dintel_overlay.c251 intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_ON); in intel_overlay_on()
252 intel_ring_emit(ring, overlay->flip_addr | OFC_UPDATE); in intel_overlay_on()
253 intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); in intel_overlay_on()
254 intel_ring_emit(ring, MI_NOOP); in intel_overlay_on()
285 intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE); in intel_overlay_continue()
286 intel_ring_emit(ring, flip_addr); in intel_overlay_continue()
340 intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_CONTINUE); in intel_overlay_off()
341 intel_ring_emit(ring, flip_addr); in intel_overlay_off()
342 intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); in intel_overlay_off()
347 intel_ring_emit(ring, MI_NOOP); in intel_overlay_off()
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Di915_gem_execbuffer.c823 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in i915_reset_gen7_sol_offsets()
824 intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i)); in i915_reset_gen7_sol_offsets()
825 intel_ring_emit(ring, 0); in i915_reset_gen7_sol_offsets()
1036 intel_ring_emit(ring, MI_NOOP); in i915_gem_do_execbuffer()
1037 intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); in i915_gem_do_execbuffer()
1038 intel_ring_emit(ring, INSTPM); in i915_gem_do_execbuffer()
1039 intel_ring_emit(ring, mask << 16 | mode); in i915_gem_do_execbuffer()
Dintel_ringbuffer.h212 static inline void intel_ring_emit(struct intel_ring_buffer *ring, in intel_ring_emit() function
Dintel_display.c7122 intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask); in intel_gen2_queue_flip()
7123 intel_ring_emit(ring, MI_NOOP); in intel_gen2_queue_flip()
7124 intel_ring_emit(ring, MI_DISPLAY_FLIP | in intel_gen2_queue_flip()
7126 intel_ring_emit(ring, fb->pitches[0]); in intel_gen2_queue_flip()
7127 intel_ring_emit(ring, obj->gtt_offset + intel_crtc->dspaddr_offset); in intel_gen2_queue_flip()
7128 intel_ring_emit(ring, 0); /* aux display base address, unused */ in intel_gen2_queue_flip()
7163 intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask); in intel_gen3_queue_flip()
7164 intel_ring_emit(ring, MI_NOOP); in intel_gen3_queue_flip()
7165 intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | in intel_gen3_queue_flip()
7167 intel_ring_emit(ring, fb->pitches[0]); in intel_gen3_queue_flip()
[all …]
Dintel_pm.c2832 intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN); in ironlake_enable_rc6()
2833 intel_ring_emit(ring, MI_SET_CONTEXT); in ironlake_enable_rc6()
2834 intel_ring_emit(ring, dev_priv->ips.renderctx->gtt_offset | in ironlake_enable_rc6()
2839 intel_ring_emit(ring, MI_SUSPEND_FLUSH); in ironlake_enable_rc6()
2840 intel_ring_emit(ring, MI_NOOP); in ironlake_enable_rc6()
2841 intel_ring_emit(ring, MI_FLUSH); in ironlake_enable_rc6()
Di915_dma.c53 intel_ring_emit(LP_RING(dev_priv), x)