| /drivers/gpu/drm/omapdrm/ |
| D | omap_irq.c | 35 uint32_t irqmask = priv->vblank_mask; in omap_irq_update() local
40 irqmask |= irq->irqmask; in omap_irq_update()
42 DBG("irqmask=%08x", irqmask); in omap_irq_update()
44 dispc_write_irqenable(irqmask); in omap_irq_update()
99 uint32_t irqmask, int count) in omap_irq_wait_init() argument
103 wait->irq.irqmask = irqmask; in omap_irq_wait_init()
200 if (handler->irqmask & irqstatus) { in omap_irq_handler()
202 handler->irq(handler, handler->irqmask & irqstatus); in omap_irq_handler()
229 error_handler->irqmask = DISPC_IRQ_OCP_ERR; in omap_irq_postinstall()
234 error_handler->irqmask &= ~DISPC_IRQ_SYNC_LOST_DIGIT; in omap_irq_postinstall()
|
| D | omap_drv.h | 75 uint32_t irqmask; member
84 uint32_t irqmask, int count);
|
| D | omap_crtc.c | 629 omap_crtc->apply_irq.irqmask = pipe2vbl(crtc); in omap_crtc_init()
632 omap_crtc->error_irq.irqmask = in omap_crtc_init()
|
| D | omap_plane.c | 419 omap_plane->error_irq.irqmask = error_irqs[id]; in omap_plane_init()
|
| /drivers/regulator/ |
| D | lp8755.c | 51 unsigned int irqmask; member
378 && (pchip->irqmask & (0x04 << icnt)) in lp8755_irq_handler()
394 if ((flag1 & 0x01) && (pchip->irqmask & 0x01)) in lp8755_irq_handler()
402 if ((flag1 & 0x02) && (pchip->irqmask & 0x02)) in lp8755_irq_handler()
428 pchip->irqmask = regval; in lp8755_int_config()
|
| /drivers/ata/ |
| D | pata_hpt3x2n.c | 495 u8 irqmask; in hpt3x2n_init_one() local
544 pci_read_config_byte(dev, 0x5A, &irqmask); in hpt3x2n_init_one()
545 irqmask &= ~0x10; in hpt3x2n_init_one()
546 pci_write_config_byte(dev, 0x5a, irqmask); in hpt3x2n_init_one()
|
| D | pata_icside.c | 66 unsigned int irqmask; member
383 info->irqmask = 1; in pata_icside_register_v5()
444 ec->irqmask = info->irqmask; in pata_icside_add_ports()
|
| D | pata_hpt37x.c | 827 u8 irqmask; in hpt37x_init_one() local
919 pci_read_config_byte(dev, 0x5A, &irqmask); in hpt37x_init_one()
920 irqmask &= ~0x10; in hpt37x_init_one()
921 pci_write_config_byte(dev, 0x5a, irqmask); in hpt37x_init_one()
|
| /drivers/media/rc/ |
| D | winbond-cir.c | 212 u8 irqmask; member
279 wbcir_set_irqmask(struct wbcir_data *data, u8 irqmask) in wbcir_set_irqmask() argument
281 if (data->irqmask == irqmask) in wbcir_set_irqmask()
285 outb(irqmask, data->sbase + WBCIR_REG_SP3_IER); in wbcir_set_irqmask()
286 data->irqmask = irqmask; in wbcir_set_irqmask()
500 status &= data->irqmask; in wbcir_irq_handler()
|
| /drivers/video/omap2/dss/ |
| D | dispc-compat.h | 24 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
|
| D | dispc-compat.c | 638 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, in omap_dispc_wait_for_irq_interruptible_timeout() argument
650 irqmask); in omap_dispc_wait_for_irq_interruptible_timeout()
658 omap_dispc_unregister_isr(dispc_irq_wait_handler, &completion, irqmask); in omap_dispc_wait_for_irq_interruptible_timeout()
|
| /drivers/net/ethernet/nvidia/ |
| D | forcedeth.c | 782 u32 irqmask; member
3574 if (np->irqmask != NVREG_IRQMASK_CPU) { in nv_change_interrupt_mode()
3575 np->irqmask = NVREG_IRQMASK_CPU; in nv_change_interrupt_mode()
3584 if (np->irqmask != NVREG_IRQMASK_THROUGHPUT) { in nv_change_interrupt_mode()
3585 np->irqmask = NVREG_IRQMASK_THROUGHPUT; in nv_change_interrupt_mode()
3607 if (!(np->events & np->irqmask)) in nv_nic_irq()
3640 if (!(np->events & np->irqmask)) in nv_nic_irq_optimized()
3669 if (!(events & np->irqmask)) in nv_nic_irq_tx()
3749 np->nic_poll_irq = np->irqmask; in nv_napi_poll()
3763 writel(np->irqmask, base + NvRegIrqMask); in nv_napi_poll()
[all …]
|
| /drivers/mmc/host/ |
| D | mmci.c | 663 unsigned int datactrl, timeout, irqmask; in mmci_start_data() local
736 irqmask = MCI_RXFIFOHALFFULLMASK; in mmci_start_data()
744 irqmask |= MCI_RXDATAAVLBLMASK; in mmci_start_data()
750 irqmask = MCI_TXFIFOHALFEMPTYMASK; in mmci_start_data()
755 mmci_set_mask1(host, irqmask); in mmci_start_data()
|
| /drivers/media/pci/ivtv/ |
| D | ivtv-driver.c | 316 itv->irqmask &= ~mask; in ivtv_clear_irq_mask()
317 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_clear_irq_mask()
322 itv->irqmask |= mask; in ivtv_set_irq_mask()
323 write_reg_sync(itv->irqmask, IVTV_REG_IRQMASK); in ivtv_set_irq_mask()
|
| D | ivtv-irq.c | 940 combo = ~itv->irqmask & stat; in ivtv_irq_handler()
949 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) { in ivtv_irq_handler()
1015 if (~itv->irqmask & IVTV_IRQ_DEC_VSYNC) { in ivtv_irq_handler()
|
| D | ivtv-driver.h | 682 u32 irqmask; /* active interrupts */ member
|
| D | ivtv-streams.c | 768 IVTV_DEBUG_IRQ("IRQ Mask is now: 0x%08x\n", itv->irqmask); in ivtv_start_v4l2_decode_stream()
|
| /drivers/scsi/arm/ |
| D | arxescsi.c | 297 ec->irqmask = CSTATUS_IRQ; in arxescsi_probe()
|
| D | powertec.c | 350 ec->irqmask = POWERTEC_INTR_BIT; in powertecscsi_probe()
|
| D | cumana_2.c | 425 ec->irqmask = STATUS_INT; in cumanascsi2_probe()
|
| D | eesox.c | 544 ec->irqmask = EESOX_STAT_INTR; in eesoxscsi_probe()
|
| D | acornscsi.c | 2972 ec->irqmask = 0x0a; in acornscsi_probe()
|
| /drivers/ide/ |
| D | icside.c | 424 ec->irqmask = 1; in icside_register_v5()
|
| /drivers/net/ethernet/seeq/ |
| D | ether3.c | 780 ec->irqmask = 0xf0; in ether3_probe()
|
| /drivers/staging/comedi/drivers/ |
| D | ni_stc.h | 1439 int irqmask; \
|