| /drivers/video/ |
| D | macfb.c | 62 unsigned char lut; member
68 unsigned char lut; member
77 unsigned char lut; member
83 unsigned char lut; /* OFFSET: 0x10 */ member
105 unsigned char lut; member
110 unsigned char lut; /* TFBClutWDataReg, offset 0x90018 */ member
118 unsigned char lut; member
175 &dafb_cmap_regs->lut); in dafb_setpalette()
178 &dafb_cmap_regs->lut); in dafb_setpalette()
181 &dafb_cmap_regs->lut); in dafb_setpalette()
[all …]
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| D | valkyriefb.h | 55 unsigned char lut; member
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| D | valkyriefb.c | 244 out_8(&cmap_regs->lut, red); in valkyriefb_setcolreg()
245 out_8(&cmap_regs->lut, green); in valkyriefb_setcolreg()
246 out_8(&cmap_regs->lut, blue); in valkyriefb_setcolreg()
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| D | controlfb.h | 30 unsigned char lut; /* cmap data */ member
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| D | platinumfb.h | 32 unsigned char lut; member
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| D | platinumfb.c | 202 out_8(&cmap_regs->lut, red); /* send one color channel at */ in platinumfb_setcolreg()
203 out_8(&cmap_regs->lut, green); /* a time... */ in platinumfb_setcolreg()
204 out_8(&cmap_regs->lut, blue); in platinumfb_setcolreg()
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| D | controlfb.c | 356 out_8(&p->cmap_regs->lut, r); /* send one color channel at */ in controlfb_setcolreg()
357 out_8(&p->cmap_regs->lut, g); /* a time... */ in controlfb_setcolreg()
358 out_8(&p->cmap_regs->lut, b); in controlfb_setcolreg()
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| /drivers/gpio/ |
| D | gpio-adp5520.c | 21 unsigned char lut[ADP5520_MAXGPIOS]; member
42 return !!(reg_val & dev->lut[off]); in adp5520_gpio_get_value()
52 adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); in adp5520_gpio_set_value()
54 adp5520_clr_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); in adp5520_gpio_set_value()
65 dev->lut[off]); in adp5520_gpio_direction_input()
79 dev->lut[off]); in adp5520_gpio_direction_output()
82 dev->lut[off]); in adp5520_gpio_direction_output()
85 dev->lut[off]); in adp5520_gpio_direction_output()
118 dev->lut[gpios++] = 1 << i; in adp5520_gpio_probe()
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| /drivers/power/ |
| D | s3c_adc_battery.c | 148 const struct s3c_adc_bat_thresh *lut; in s3c_adc_bat_get_property() local
156 lut = bat->pdata->lut_noac; in s3c_adc_bat_get_property()
174 lut = bat->pdata->lut_acin; in s3c_adc_bat_get_property()
182 if (full_volt < calc_full_volt(lut->volt, lut->cur, in s3c_adc_bat_get_property()
189 lut_volt1 = calc_full_volt(lut[0].volt, lut[0].cur, in s3c_adc_bat_get_property()
191 lut_volt2 = calc_full_volt(lut[1].volt, lut[1].cur, in s3c_adc_bat_get_property()
194 new_level = (lut[1].level + in s3c_adc_bat_get_property()
195 (lut[0].level - lut[1].level) * in s3c_adc_bat_get_property()
200 new_level = lut[1].level * 1000; in s3c_adc_bat_get_property()
201 lut++; in s3c_adc_bat_get_property()
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| /drivers/gpu/drm/nouveau/ |
| D | nv50_display.c | 999 evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); in nv50_crtc_commit()
1006 evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); in nv50_crtc_commit()
1014 evo_data(push, nv_crtc->lut.nvbo->bo.offset >> 8); in nv50_crtc_commit()
1181 void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo); in nv50_crtc_lut_load() local
1185 u16 r = nv_crtc->lut.r[i] >> 2; in nv50_crtc_lut_load()
1186 u16 g = nv_crtc->lut.g[i] >> 2; in nv50_crtc_lut_load()
1187 u16 b = nv_crtc->lut.b[i] >> 2; in nv50_crtc_lut_load()
1190 writew(r + 0x0000, lut + (i * 0x08) + 0); in nv50_crtc_lut_load()
1191 writew(g + 0x0000, lut + (i * 0x08) + 2); in nv50_crtc_lut_load()
1192 writew(b + 0x0000, lut + (i * 0x08) + 4); in nv50_crtc_lut_load()
[all …]
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| D | nouveau_fbcon.c | 220 nv_crtc->lut.r[regno] = red; in nouveau_fbcon_gamma_set()
221 nv_crtc->lut.g[regno] = green; in nouveau_fbcon_gamma_set()
222 nv_crtc->lut.b[regno] = blue; in nouveau_fbcon_gamma_set()
230 *red = nv_crtc->lut.r[regno]; in nouveau_fbcon_gamma_get()
231 *green = nv_crtc->lut.g[regno]; in nouveau_fbcon_gamma_get()
232 *blue = nv_crtc->lut.b[regno]; in nouveau_fbcon_gamma_get()
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| D | nouveau_crtc.h | 68 } lut; member
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| D | nouveau_display.c | 444 nv_crtc->lut.depth = 0; in nouveau_display_resume()
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| /drivers/staging/media/davinci_vpfe/ |
| D | dm365_ipipe.c | 722 static int ipipe_validate_3d_lut_params(struct vpfe_ipipe_3d_lut *lut) in ipipe_validate_3d_lut_params() argument
726 if (!lut->en) in ipipe_validate_3d_lut_params()
730 if (lut->table[i].r > D3_LUT_ENTRY_MASK || in ipipe_validate_3d_lut_params()
731 lut->table[i].g > D3_LUT_ENTRY_MASK || in ipipe_validate_3d_lut_params()
732 lut->table[i].b > D3_LUT_ENTRY_MASK) in ipipe_validate_3d_lut_params()
741 struct vpfe_ipipe_3d_lut *lut = &ipipe->config.lut; in ipipe_get_3d_lut_params() local
744 lut_param->en = lut->en; in ipipe_get_3d_lut_params()
750 memcpy(lut_param->table, &lut->table, in ipipe_get_3d_lut_params()
761 struct vpfe_ipipe_3d_lut *lut = &ipipe->config.lut; in ipipe_set_3d_lut_params() local
765 memset(lut, 0, sizeof(struct vpfe_ipipe_3d_lut)); in ipipe_set_3d_lut_params()
[all …]
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| D | dm365_ipipe.h | 91 struct vpfe_ipipe_3d_lut lut; member
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| D | davinci_vpfe_user.h | 1182 struct vpfe_ipipe_3d_lut __user *lut; member
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | crtc.c | 748 rgbs[i].r = nv_crtc->lut.r[i] >> 8; in nv_crtc_gamma_load()
749 rgbs[i].g = nv_crtc->lut.g[i] >> 8; in nv_crtc_gamma_load()
750 rgbs[i].b = nv_crtc->lut.b[i] >> 8; in nv_crtc_gamma_load()
764 nv_crtc->lut.r[i] = r[i]; in nv_crtc_gamma_set()
765 nv_crtc->lut.g[i] = g[i]; in nv_crtc_gamma_set()
766 nv_crtc->lut.b[i] = b[i]; in nv_crtc_gamma_set()
775 nv_crtc->lut.depth = 0; in nv_crtc_gamma_set()
830 if (nv_crtc->lut.depth != drm_fb->depth) { in nv04_crtc_do_mode_set_base()
831 nv_crtc->lut.depth = drm_fb->depth; in nv04_crtc_do_mode_set_base()
1043 nv_crtc->lut.r[i] = i << 8; in nv04_crtc_create()
[all …]
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| /drivers/gpu/drm/i915/ |
| D | i915_gem_execbuffer.c | 40 struct drm_i915_gem_object *lut[0]; member
116 eb->lut[i] = obj; in eb_lookup_objects()
135 return eb->lut[handle]; in eb_get_object()
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| /drivers/gpu/drm/gma500/ |
| D | psb_drv.c | 460 psb_intel_crtc->lut_adj[i] = lut_arg->lut[i]; in psb_gamma_ioctl()
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