| /drivers/staging/comedi/drivers/ |
| D | addi_apci_1032.c | 53 unsigned int mode1; /* rising-edge/high level channels */ member
118 devpriv->mode1 = 0; in apci1032_cos_insn_config()
129 devpriv->mode1 = 0; in apci1032_cos_insn_config()
133 devpriv->mode1 &= oldmask; in apci1032_cos_insn_config()
137 devpriv->mode1 |= data[4] << shift; in apci1032_cos_insn_config()
147 devpriv->mode1 = 0; in apci1032_cos_insn_config()
151 devpriv->mode1 &= oldmask; in apci1032_cos_insn_config()
155 devpriv->mode1 |= data[4] << shift; in apci1032_cos_insn_config()
237 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); in apci1032_cos_cmd()
|
| D | ni_mio_common.c | 2393 int mode1 = 0; /* mode1 is needed for both stop and convert */ in ni_ai_cmd() local
2469 mode1 |= AI_Start_Stop | AI_Mode_1_Reserved | AI_Trigger_Once; in ni_ai_cmd()
2470 devpriv->stc_writew(dev, mode1, AI_Mode_1_Register); in ni_ai_cmd()
2488 mode1 |= AI_Start_Stop | AI_Mode_1_Reserved | AI_Continuous; in ni_ai_cmd()
2489 devpriv->stc_writew(dev, mode1, AI_Mode_1_Register); in ni_ai_cmd()
2574 mode1 |= AI_CONVERT_Source_Select(1 + cmd->convert_arg); in ni_ai_cmd()
2576 mode1 |= AI_CONVERT_Source_Polarity; in ni_ai_cmd()
2577 devpriv->stc_writew(dev, mode1, AI_Mode_1_Register); in ni_ai_cmd()
|
| /drivers/gpu/drm/ |
| D | drm_modes.c | 841 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) in drm_mode_equal() argument
845 if (mode1->clock && mode2->clock) { in drm_mode_equal()
846 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) in drm_mode_equal()
848 } else if (mode1->clock != mode2->clock) in drm_mode_equal()
851 return drm_mode_equal_no_clocks(mode1, mode2); in drm_mode_equal()
869 bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *… in drm_mode_equal_no_clocks() argument
871 if (mode1->hdisplay == mode2->hdisplay && in drm_mode_equal_no_clocks()
872 mode1->hsync_start == mode2->hsync_start && in drm_mode_equal_no_clocks()
873 mode1->hsync_end == mode2->hsync_end && in drm_mode_equal_no_clocks()
874 mode1->htotal == mode2->htotal && in drm_mode_equal_no_clocks()
[all …]
|
| /drivers/video/ |
| D | modedb.c | 846 int fb_mode_is_equal(const struct fb_videomode *mode1, in fb_mode_is_equal() argument
849 return (mode1->xres == mode2->xres && in fb_mode_is_equal()
850 mode1->yres == mode2->yres && in fb_mode_is_equal()
851 mode1->pixclock == mode2->pixclock && in fb_mode_is_equal()
852 mode1->hsync_len == mode2->hsync_len && in fb_mode_is_equal()
853 mode1->vsync_len == mode2->vsync_len && in fb_mode_is_equal()
854 mode1->left_margin == mode2->left_margin && in fb_mode_is_equal()
855 mode1->right_margin == mode2->right_margin && in fb_mode_is_equal()
856 mode1->upper_margin == mode2->upper_margin && in fb_mode_is_equal()
857 mode1->lower_margin == mode2->lower_margin && in fb_mode_is_equal()
[all …]
|
| D | fbmem.c | 943 struct fb_videomode mode1, mode2; in fb_set_var() local
945 fb_var_to_videomode(&mode1, var); in fb_set_var()
948 ret = fb_mode_is_equal(&mode1, &mode2); in fb_set_var()
954 event.data = &mode1; in fb_set_var()
959 fb_delete_videomode(&mode1, &info->modelist); in fb_set_var()
|
| /drivers/tty/serial/ |
| D | sb1250-duart.c | 480 unsigned int mode1; in sbd_startup() local
496 mode1 = read_sbdchn(sport, R_DUART_MODE_REG_1); in sbd_startup()
497 mode1 &= ~(M_DUART_RX_IRQ_SEL_RXFULL | M_DUART_TX_IRQ_SEL_TXEMPT); in sbd_startup()
498 write_sbdchn(sport, R_DUART_MODE_REG_1, mode1); in sbd_startup()
546 unsigned int mode1 = 0, mode2 = 0, aux = 0; in sbd_set_termios() local
565 mode1 |= V_DUART_BITS_PER_CHAR_7; in sbd_set_termios()
569 mode1 |= V_DUART_BITS_PER_CHAR_8; in sbd_set_termios()
579 mode1 |= V_DUART_PARITY_MODE_ADD; in sbd_set_termios()
581 mode1 |= V_DUART_PARITY_MODE_NONE; in sbd_set_termios()
583 mode1 |= M_DUART_PARITY_TYPE_ODD; in sbd_set_termios()
[all …]
|
| /drivers/gpu/drm/radeon/ |
| D | rs690.c | 194 struct drm_display_mode *mode1, in rs690_line_buffer_adjust() argument
216 if (mode1 && mode2) { in rs690_line_buffer_adjust()
217 if (mode1->hdisplay > mode2->hdisplay) { in rs690_line_buffer_adjust()
218 if (mode1->hdisplay > 2560) in rs690_line_buffer_adjust()
222 } else if (mode2->hdisplay > mode1->hdisplay) { in rs690_line_buffer_adjust()
229 } else if (mode1) { in rs690_line_buffer_adjust()
421 struct drm_display_mode *mode1 = NULL; in rs690_bandwidth_update() local
435 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rs690_bandwidth_update()
448 if (mode1) in rs690_bandwidth_update()
452 rs690_line_buffer_adjust(rdev, mode0, mode1); in rs690_bandwidth_update()
[all …]
|
| D | rv515.c | 1083 struct drm_display_mode *mode1 = NULL; in rv515_bandwidth_avivo_update() local
1095 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rv515_bandwidth_avivo_update()
1096 rs690_line_buffer_adjust(rdev, mode0, mode1); in rv515_bandwidth_avivo_update()
1105 if (mode0 && mode1) { in rv515_bandwidth_avivo_update()
1191 } else if (mode1) { in rv515_bandwidth_avivo_update()
1232 struct drm_display_mode *mode1 = NULL; in rv515_bandwidth_update() local
1239 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rv515_bandwidth_update()
1250 if (mode1) in rv515_bandwidth_update()
|
| D | rs600.c | 823 struct drm_display_mode *mode1 = NULL; in rs600_bandwidth_update() local
832 mode1 = &rdev->mode_info.crtcs[1]->base.mode; in rs600_bandwidth_update()
834 rs690_line_buffer_adjust(rdev, mode0, mode1); in rs600_bandwidth_update()
|
| D | r100.c | 3190 struct drm_display_mode *mode1 = NULL; in r100_bandwidth_update() local
3198 mode1 = &rdev->mode_info.crtcs[0]->base.mode; in r100_bandwidth_update()
3217 if (mode1) in r100_bandwidth_update()
3235 if (mode1) { in r100_bandwidth_update()
3237 pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ in r100_bandwidth_update()
3429 if (mode1) { in r100_bandwidth_update()
3434 stop_req = mode1->hdisplay * pixel_bytes1 / 16; in r100_bandwidth_update()
3551 if (mode1) { in r100_bandwidth_update()
|
| D | radeon_asic.h | 256 struct drm_display_mode *mode1,
|
| D | evergreen.c | 2153 struct drm_display_mode *mode1 = NULL; in evergreen_bandwidth_update() local
2165 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; in evergreen_bandwidth_update()
2166 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in evergreen_bandwidth_update()
2168 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in evergreen_bandwidth_update()
|
| D | si.c | 1903 struct drm_display_mode *mode1 = NULL; in dce6_bandwidth_update() local
1915 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; in dce6_bandwidth_update()
1916 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); in dce6_bandwidth_update()
1918 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); in dce6_bandwidth_update()
|
| /drivers/block/ |
| D | swim.c | 315 swim_write(base, mode1, INTERNAL_DRIVE); /* set drive 0 bit */ in swim_drive()
318 swim_write(base, mode1, EXTERNAL_DRIVE); /* set drive 1 bit */ in swim_drive()
471 swim_write(base, mode1, MOTON); in swim_read_sector()
|