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Searched refs:outw (Results 1 – 25 of 136) sorted by relevance

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/drivers/staging/comedi/drivers/
Dni_atmio16d.c167 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); in reset_counters()
168 outw(0xFF02, dev->iobase + AM9513A_COM_REG); in reset_counters()
169 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
170 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); in reset_counters()
171 outw(0x3, dev->iobase + AM9513A_DATA_REG); in reset_counters()
172 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
173 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
175 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); in reset_counters()
176 outw(0xFF03, dev->iobase + AM9513A_COM_REG); in reset_counters()
177 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
[all …]
Ds526.c187 outw(cmReg.value, chan_iobase + REG_C0M); in s526_gpct_insn_config()
189 outw(0x0001, chan_iobase + REG_C0H); in s526_gpct_insn_config()
190 outw(0x3C68, chan_iobase + REG_C0L); in s526_gpct_insn_config()
193 outw(0x8000, chan_iobase + REG_C0C); in s526_gpct_insn_config()
195 outw(0x4000, chan_iobase + REG_C0C); in s526_gpct_insn_config()
198 outw(0x0008, chan_iobase + REG_C0C); in s526_gpct_insn_config()
205 outw(cmReg.value, chan_iobase + REG_C0M); in s526_gpct_insn_config()
210 outw(0x8000, chan_iobase + REG_C0C); in s526_gpct_insn_config()
240 outw(cmReg.value, chan_iobase + REG_C0M); in s526_gpct_insn_config()
244 outw(val, chan_iobase + REG_C0H); in s526_gpct_insn_config()
[all …]
Dni_at_ao.c177 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1); in atao_reset()
184 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2); in atao_reset()
187 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3); in atao_reset()
192 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1); in atao_reset()
194 outw(0, dev->iobase + ATAO_2_INT1CLR); in atao_reset()
195 outw(0, dev->iobase + ATAO_2_INT2CLR); in atao_reset()
196 outw(0, dev->iobase + ATAO_2_DMATCCLR); in atao_reset()
199 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1); in atao_reset()
214 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1); in atao_ao_winsn()
216 outw(bits, dev->iobase + ATAO_DACn(chan)); in atao_ao_winsn()
[all …]
Dadv_pci1710.c404 outw(chanprog, dev->iobase + PCI171x_MUX); /* select channel */ in setup_channel_list()
408 outw(range, dev->iobase + PCI171x_RANGE); /* select gain */ in setup_channel_list()
424 outw(devpriv->ai_et_MuxVal, dev->iobase + PCI171x_MUX); in setup_channel_list()
443 outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL); in pci171x_insn_read_ai()
450 outw(0, dev->iobase + PCI171x_SOFTTRG); /* start conversion */ in pci171x_insn_read_ai()
499 outw(devpriv->da_ranges, dev->iobase + PCI171x_DAREF); in pci171x_insn_write_ao()
504 outw(devpriv->da_ranges, dev->iobase + PCI171x_DAREF); in pci171x_insn_write_ao()
509 outw(data[n], dev->iobase + ofs); in pci171x_insn_write_ao()
556 outw(s->state, dev->iobase + PCI171x_DO); in pci171x_insn_bits_do()
569 outw(0xb4, dev->iobase + PCI171x_CNTCTRL); in start_pacer()
[all …]
Dcb_pcidas.c401 outw(cal_enable_bits(dev), in cb_pcidas_ai_rinsn()
405 outw(0, devpriv->control_status + CALIBRATION_REG); in cb_pcidas_ai_rinsn()
416 outw(bits, devpriv->control_status + ADCMUX_CONT); in cb_pcidas_ai_rinsn()
419 outw(0, devpriv->adc_fifo + ADCFIFOCLR); in cb_pcidas_ai_rinsn()
424 outw(0, devpriv->adc_fifo + ADCDATA); in cb_pcidas_ai_rinsn()
483 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); in cb_pcidas_ao_nofifo_winsn()
490 outw(data[0], devpriv->ao_registers + DAC_DATA_REG(chan)); in cb_pcidas_ao_nofifo_winsn()
506 outw(0, devpriv->ao_registers + DACFIFOCLR); in cb_pcidas_ao_fifo_winsn()
514 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); in cb_pcidas_ao_fifo_winsn()
521 outw(data[0], devpriv->ao_registers + DACDATA); in cb_pcidas_ao_fifo_winsn()
[all …]
Dni_at_a2150.c292 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG); in a2150_interrupt()
303 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG); in a2150_cancel()
309 outw(0, dev->iobase + FIFO_RESET_REG); in a2150_cancel()
429 outw(0, dev->iobase + FIFO_RESET_REG); in a2150_ai_cmd()
450 outw(devpriv->config_bits, dev->iobase + CONFIG_REG); in a2150_ai_cmd()
479 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG); in a2150_ai_cmd()
483 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG); in a2150_ai_cmd()
508 outw(trigger_bits, dev->iobase + TRIGGER_REG); in a2150_ai_cmd()
512 outw(0, dev->iobase + FIFO_START_REG); in a2150_ai_cmd()
529 outw(0, dev->iobase + FIFO_RESET_REG); in a2150_ai_rinsn()
[all …]
Dadv_pci1723.c123 outw(0x01, dev->iobase + PCI1723_SYN_SET); in pci1723_reset()
129 outw(devpriv->ao_data[i], dev->iobase + PCI1723_DA(i)); in pci1723_reset()
132 outw(((devpriv->da_range[i] << 4) | i), in pci1723_reset()
136 outw(0, dev->iobase + PCI1723_CHANGE_CHA_OUTPUT_TYPE_STROBE); in pci1723_reset()
138 outw(0, dev->iobase + PCI1723_SYN_STROBE); /* update outputs */ in pci1723_reset()
141 outw(0, dev->iobase + PCI1723_SYN_SET); in pci1723_reset()
174 outw(data[n], dev->iobase + PCI1723_DA(chan)); in pci1723_ao_write_winsn()
217 outw(dio_mode, dev->iobase + PCI1723_DIGITAL_IO_PORT_SET); in pci1723_dio_insn_config()
231 outw(s->state, dev->iobase + PCI1723_WRITE_DIGITAL_OUTPUT_CMD); in pci1723_dio_insn_bits()
Ddt282x.c317 outw(devpriv->supcsr | DT2821_CLRDMADNE, dev->iobase + DT2821_SUPCSR); in dt282x_ao_dma_interrupt()
351 outw(devpriv->supcsr | DT2821_CLRDMADNE, dev->iobase + DT2821_SUPCSR); in dt282x_ai_dma_interrupt()
388 outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR); in dt282x_ai_dma_interrupt()
517 outw(devpriv->supcsr | DT2821_STRIG, in dt282x_interrupt()
536 outw(DT2821_LLE | (n - 1), dev->iobase + DT2821_CHANCSR); in dt282x_load_changain()
540 outw(devpriv->adcsr | (range << 4) | chan, in dt282x_load_changain()
543 outw(n - 1, dev->iobase + DT2821_CHANCSR); in dt282x_load_changain()
562 outw(devpriv->adcsr, dev->iobase + DT2821_ADCSR); in dt282x_ai_insn_read()
566 outw(devpriv->supcsr | DT2821_PRLD, dev->iobase + DT2821_SUPCSR); in dt282x_ai_insn_read()
570 outw(devpriv->supcsr | DT2821_STRIG, in dt282x_ai_insn_read()
[all …]
Dcb_das16_cs.c119 outw(chan, dev->iobase + DAS16CS_DIO_MUX); in das16cs_ai_rinsn()
123 outw(devpriv->status1, dev->iobase + DAS16CS_MISC1); in das16cs_ai_rinsn()
140 outw(devpriv->status2, dev->iobase + DAS16CS_MISC2); in das16cs_ai_rinsn()
143 outw(0, dev->iobase + DAS16CS_ADC_DATA); in das16cs_ai_rinsn()
286 outw(devpriv->status1, dev->iobase + DAS16CS_MISC1); in das16cs_ao_winsn()
295 outw(status1, dev->iobase + DAS16CS_MISC1); in das16cs_ao_winsn()
301 outw(status1 | b | 0x0000, dev->iobase + DAS16CS_MISC1); in das16cs_ao_winsn()
303 outw(status1 | b | 0x0004, dev->iobase + DAS16CS_MISC1); in das16cs_ao_winsn()
310 outw(status1 | 0x9, dev->iobase + DAS16CS_MISC1); in das16cs_ao_winsn()
338 outw(s->state, dev->iobase + DAS16CS_DIO); in das16cs_dio_insn_bits()
[all …]
Dmultiq3.c99 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_AD_MUX_EN | (chan << 3), in multiq3_ai_insn_read()
110 outw(0, dev->iobase + MULTIQ3_AD_CS); in multiq3_ai_insn_read()
150 outw(MULTIQ3_CONTROL_MUST | MULTIQ3_DA_LOAD | chan, in multiq3_ao_insn_write()
152 outw(data[i], dev->iobase + MULTIQ3_DAC_DATA); in multiq3_ao_insn_write()
153 outw(MULTIQ3_CONTROL_MUST, dev->iobase + MULTIQ3_CONTROL); in multiq3_ao_insn_write()
176 outw(s->state, dev->iobase + MULTIQ3_DIGOUT_PORT); in multiq3_do_insn_bits()
194 outw(control, dev->iobase + MULTIQ3_CONTROL); in multiq3_encoder_insn_read()
214 outw(control, dev->iobase + MULTIQ3_CONTROL); in encoder_reset()
/drivers/staging/comedi/drivers/addi-data/
Dhwdrv_apci3120.c334 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS); in i_APCI3120_SetupChannelList()
348 outw(us_TmpValue, dev->iobase + APCI3120_SEQ_RAM_ADDRESS); in i_APCI3120_SetupChannelList()
467 outw(devpriv->us_OutputRegister, in i_APCI3120_InsnReadAnalogInput()
477 outw(us_ConvertTiming, in i_APCI3120_InsnReadAnalogInput()
514 outw(devpriv->us_OutputRegister, in i_APCI3120_InsnReadAnalogInput()
537 outw(us_ConvertTiming, in i_APCI3120_InsnReadAnalogInput()
573 outw(devpriv->us_OutputRegister, in i_APCI3120_InsnReadAnalogInput()
577 outw(0, devpriv->iobase + APCI3120_START_CONVERSION); in i_APCI3120_InsnReadAnalogInput()
635 outw(devpriv->us_OutputRegister, dev->iobase + APCI3120_WR_ADDRESS); in i_APCI3120_Reset()
641 outw(8191 | APCI3120_ANALOG_OP_CHANNEL_1, dev->iobase + APCI3120_ANALOG_OUTPUT_1); /* channel 1 */ in i_APCI3120_Reset()
[all …]
/drivers/net/ethernet/3com/
D3c509.c120 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
330 outw(0x0f00, ioaddr + WN0_IRQ); in el3_isa_match()
377 outw(0x0f00, ioaddr + WN0_IRQ); in el3_isa_resume()
583 outw(SelectWindow | 0, ioaddr + 0xC80 + EL3_CMD); in el3_eisa_probe()
635 outw(EEPROM_READ + index, ioaddr + 10); in read_eeprom()
671 outw(TxReset, ioaddr + EL3_CMD); in el3_open()
672 outw(RxReset, ioaddr + EL3_CMD); in el3_open()
673 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD); in el3_open()
705 outw(TxReset, ioaddr + EL3_CMD); in el3_tx_timeout()
706 outw(TxEnable, ioaddr + EL3_CMD); in el3_tx_timeout()
[all …]
D3c574_cs.c132 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
372 outw(2<<11, ioaddr + RunnerRdCtrl); in tc574_config()
374 outw(0<<11, ioaddr + RunnerRdCtrl); in tc574_config()
388 outw(0x8040, ioaddr + Wn3_Options); in tc574_config()
390 outw(0xc040, ioaddr + Wn3_Options); in tc574_config()
394 outw(0x8040, ioaddr + Wn3_Options); in tc574_config()
495 outw(cmd, dev->base_addr + EL3_CMD); in tc574_wait_for_completion()
508 outw(EEPROM_Read + index, ioaddr + Wn0EepromCmd); in read_eeprom()
539 outw(MDIO_DATA_WRITE1, mdio_addr); in mdio_sync()
540 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr); in mdio_sync()
[all …]
D3c589_cs.c66 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
299 outw(0x3f00, ioaddr + 8); in tc589_config()
363 outw(cmd, dev->base_addr + EL3_CMD); in tc589_wait_for_completion()
377 outw(EEPROM_READ + index, ioaddr + 10); in read_eeprom()
396 case 0: case 1: outw(0, ioaddr + 6); break; in tc589_set_xcvr()
397 case 2: outw(3<<14, ioaddr + 6); break; in tc589_set_xcvr()
398 case 3: outw(1<<14, ioaddr + 6); break; in tc589_set_xcvr()
401 outw((if_port == 2) ? StartCoax : StopCoax, ioaddr + EL3_CMD); in tc589_set_xcvr()
404 outw(MEDIA_LED | ((if_port < 2) ? MEDIA_TP : 0), ioaddr + WN4_MEDIA); in tc589_set_xcvr()
433 outw(0x0001, ioaddr + 4); /* Activate board. */ in tc589_reset()
[all …]
D3c515.c175 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
458 outw(EEPROM_Read + 7, ioaddr + Wn0EepromCmd); in check_device()
478 outw(TotalReset, dev->base_addr + EL3_CMD); in cleanup_card()
636 outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd); in corkscrew_setup()
752 outw(TxReset, ioaddr + EL3_CMD); in corkscrew_open()
757 outw(RxReset, ioaddr + EL3_CMD); in corkscrew_open()
763 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD); in corkscrew_open()
791 outw(0, ioaddr + i); in corkscrew_open()
795 outw(StartCoax, ioaddr + EL3_CMD); in corkscrew_open()
797 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP | Media_SQE)) | in corkscrew_open()
[all …]
/drivers/net/ethernet/amd/
Dlance.c510 outw(reset_val, ioaddr+LANCE_RESET); in lance_probe1()
512 outw(0x0000, ioaddr+LANCE_ADDR); /* Switch to window 0 */ in lance_probe1()
517 outw(88, ioaddr+LANCE_ADDR); in lance_probe1()
522 outw(89, ioaddr+LANCE_ADDR); in lance_probe1()
578 outw(0x0001, ioaddr+LANCE_ADDR); in lance_probe1()
580 outw((short) (u32) isa_virt_to_bus(&lp->init_block), ioaddr+LANCE_DATA); in lance_probe1()
581 outw(0x0002, ioaddr+LANCE_ADDR); in lance_probe1()
583 outw(((u32)isa_virt_to_bus(&lp->init_block)) >> 16, ioaddr+LANCE_DATA); in lance_probe1()
584 outw(0x0000, ioaddr+LANCE_ADDR); in lance_probe1()
606 outw(8, ioaddr+LANCE_ADDR); in lance_probe1()
[all …]
/drivers/tty/
Disicom.c141 #define InterruptTheCard(base) outw(0, (base) + 0xc)
276 outw(0x8000 | (channel << card->shift_count) | 0x02, base); in raise_dtr()
277 outw(0x0504, base); in raise_dtr()
292 outw(0x8000 | (channel << card->shift_count) | 0x02, base); in drop_dtr()
293 outw(0x0404, base); in drop_dtr()
308 outw(0x8000 | (channel << card->shift_count) | 0x02, base); in raise_rts()
309 outw(0x0a04, base); in raise_rts()
324 outw(0x8000 | (channel << card->shift_count) | 0x02, base); in drop_rts()
325 outw(0x0804, base); in drop_rts()
343 outw(0x8000 | (channel << card->shift_count) | 0x02, base); in isicom_dtr_rts()
[all …]
/drivers/net/ethernet/smsc/
Dsmc9194.c339 outw( RCR_SOFTRESET, ioaddr + RCR ); in smc_reset()
346 outw( RCR_CLEAR, ioaddr + RCR ); in smc_reset()
347 outw( TCR_CLEAR, ioaddr + TCR ); in smc_reset()
353 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL ); in smc_reset()
357 outw( MC_RESET, ioaddr + MMU_CMD ); in smc_reset()
378 outw( TCR_NORMAL, ioaddr + TCR ); in smc_enable()
379 outw( RCR_NORMAL, ioaddr + RCR ); in smc_enable()
413 outw( inw( ioaddr + CONTROL ), CTL_POWERDOWN, ioaddr + CONTROL ); in smc_shutdown()
537 outw( MC_ALLOC | numPages, ioaddr + MMU_CMD ); in smc_wait_to_send_packet()
626 outw( PTR_AUTOINC , ioaddr + POINTER ); in smc_hardware_send_packet()
[all …]
Dsmc91c92_cs.c146 #define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
262 #define set_bits(v, p) outw(inw(p)|(v), (p))
263 #define mask_bits(v, p) outw(inw(p)&(v), (p))
549 outw(MOT_EEPROM + i, ioaddr + POINTER); in mot_setup()
551 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL); in mot_setup()
773 outw(0, ioaddr + CONTROL); in check_sig()
1044 outw(save, ioaddr + BANK_SELECT); in smc_dump()
1099 outw(0, ioaddr + INTERRUPT); in smc_close()
1106 outw(CTL_POWERDOWN, ioaddr + CONTROL ); in smc_close()
1148 outw(packet_no, ioaddr + PNR_ARR); in smc_hardware_send_packet()
[all …]
/drivers/char/
Dds1302.c42 outw(0x0001,(unsigned long)PLD_RTCRSTODT); in out_byte_rtc()
44 outw(((x<<8)|(reg_addr&0xff)),(unsigned long)PLD_RTCWRDATA); in out_byte_rtc()
46 outw(0x0002,(unsigned long)PLD_RTCCR); in out_byte_rtc()
51 outw(0x0000,(unsigned long)PLD_RTCRSTODT); in out_byte_rtc()
61 outw(0x0001,(unsigned long)PLD_RTCRSTODT); in in_byte_rtc()
63 outw((reg_addr&0xff),(unsigned long)PLD_RTCRDDATA); in in_byte_rtc()
65 outw(0x0001,(unsigned long)PLD_RTCCR); in in_byte_rtc()
73 outw(0x0000,(unsigned long)PLD_RTCRSTODT); in in_byte_rtc()
307 outw(0x0000,(unsigned long)PLD_RTCCR); in ds1302_probe()
308 outw(0x0000,(unsigned long)PLD_RTCRSTODT); in ds1302_probe()
[all …]
/drivers/ide/
Dtc86c001.c42 outw(scr, scr_port); in tc86c001_set_mode()
86 outw(0, sc_base + 0x0a); /* Sector Count */ in tc86c001_timer_expiry()
87 outw(0, twcr_port); /* Transfer Word Count 1 or 2 */ in tc86c001_timer_expiry()
124 outw(nsectors, sc_base + 0x0a); /* Sector Count */ in tc86c001_dma_start()
125 outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */ in tc86c001_dma_start()
154 outw(scr1 | 0x8000, sc_base + 0x00); in init_hwif_tc86c001()
157 outw(scr1 | 0x4000, sc_base + 0x00); in init_hwif_tc86c001()
160 outw(scr1 & ~0xc000, sc_base + 0x00); in init_hwif_tc86c001()
172 outw(0x0003, sc_base + 0x0c); in init_hwif_tc86c001()
/drivers/video/omap2/dss/
Doverlay.c158 u16 outw, outh; in dss_ovl_check() local
165 outw = info->width; in dss_ovl_check()
169 outw = info->width; in dss_ovl_check()
171 outw = info->out_width; in dss_ovl_check()
179 if (dw < info->pos_x + outw) { in dss_ovl_check()
182 ovl->id, info->pos_x, outw, dw); in dss_ovl_check()
/drivers/net/ethernet/hp/
Dhp100.h594 outw( data, ioaddr + HP100_REG_##reg )
600 outw( inw( ioaddr + HP100_REG_##reg ) | (data), ioaddr + HP100_REG_##reg )
604 outw( inw( ioaddr + HP100_REG_##reg ) & (data), ioaddr + HP100_REG_##reg )
607 outw( HP100_PAGE_##page, ioaddr + HP100_REG_PAGING )
609 outw( HP100_INT_EN | HP100_RESET_LB, ioaddr + HP100_REG_OPTION_LSW )
611 outw( HP100_INT_EN | HP100_SET_LB, ioaddr + HP100_REG_OPTION_LSW )
613 outw( HP100_MMAP_DIS | HP100_RESET_HB, ioaddr + HP100_REG_OPTION_LSW )
615 outw( HP100_MMAP_DIS | HP100_SET_HB, ioaddr + HP100_REG_OPTION_LSW )
/drivers/watchdog/
DiTCO_wdt.c198 outw(0x01, TCO_RLD); in iTCO_wdt_start()
205 outw(val, TCO1_CNT); in iTCO_wdt_start()
225 outw(val, TCO1_CNT); in iTCO_wdt_stop()
246 outw(0x01, TCO_RLD); in iTCO_wdt_ping()
250 outw(0x0008, TCO1_STS); /* write 1 to clear bit */ in iTCO_wdt_ping()
287 outw(val16, TCOv2_TMR); in iTCO_wdt_set_timeout()
483 outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ in iTCO_wdt_probe()
484 outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */ in iTCO_wdt_probe()
485 outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */ in iTCO_wdt_probe()
/drivers/net/ethernet/ti/
Dtlan.h448 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read8()
458 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read16()
468 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_read32()
478 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write8()
488 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write16()
489 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); in tlan_dio_write16()
498 outw(internal_addr, base_addr + TLAN_DIO_ADR); in tlan_dio_write32()

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