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Searched refs:pipestat (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/gma500/
Dpsb_irq.c88 if ((dev_priv->pipestat[pipe] & mask) != mask) { in psb_enable_pipestat()
90 dev_priv->pipestat[pipe] |= mask; in psb_enable_pipestat()
105 if ((dev_priv->pipestat[pipe] & mask) != 0) { in psb_disable_pipestat()
107 dev_priv->pipestat[pipe] &= ~mask; in psb_disable_pipestat()
131 if (dev_priv->pipestat[pipe] == 0) { in mid_disable_pipe_event()
153 uint32_t pipe_enable = dev_priv->pipestat[pipe]; in mid_pipe_event_handler()
154 uint32_t pipe_status = dev_priv->pipestat[pipe] >> 16; in mid_pipe_event_handler()
Dpsb_drv.c351 dev_priv->pipestat[0] = 0; in psb_driver_load()
352 dev_priv->pipestat[1] = 0; in psb_driver_load()
353 dev_priv->pipestat[2] = 0; in psb_driver_load()
Dpsb_drv.h494 uint32_t pipestat[PSB_NUM_PIPE]; member
/drivers/gpu/drm/i915/
Di915_irq.c119 u32 pipestat = I915_READ(reg) & 0x7fff0000; in i915_enable_pipestat() local
121 if ((pipestat & mask) == mask) in i915_enable_pipestat()
125 pipestat |= mask | (mask >> 16); in i915_enable_pipestat()
126 I915_WRITE(reg, pipestat); in i915_enable_pipestat()
134 u32 pipestat = I915_READ(reg) & 0x7fff0000; in i915_disable_pipestat() local
136 if ((pipestat & mask) == 0) in i915_disable_pipestat()
139 pipestat &= ~mask; in i915_disable_pipestat()
140 I915_WRITE(reg, pipestat); in i915_disable_pipestat()
1532 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); in i915_capture_error_state()
Di915_drv.h228 u32 pipestat[I915_MAX_PIPES]; member