Searched refs:pll_reg (Results 1 – 4 of 4) sorted by relevance
| /drivers/media/tuners/ |
| D | xc5000.c | 217 u16 pll_reg; member
226 .pll_reg = 0x806c,
233 .pll_reg = 0x13,
640 priv->pll_register_no = desired_fw->pll_reg; in xc5000_fwupload()
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| /drivers/gpu/drm/i915/ |
| D | intel_display.c | 1087 val = I915_READ(pll->pll_reg); in assert_pch_pll()
1091 pll->pll_reg, state_string(state), state_string(cur_state), val); in assert_pch_pll()
1098 cur_state = pll->pll_reg == _PCH_DPLL_B; in assert_pch_pll()
1105 pll->pll_reg == _PCH_DPLL_B, in assert_pch_pll()
1614 pll->pll_reg, pll->active, pll->on, in ironlake_enable_pch_pll()
1625 DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg); in ironlake_enable_pch_pll()
1627 reg = pll->pll_reg; in ironlake_enable_pch_pll()
1653 pll->pll_reg, pll->active, pll->on, in intel_disable_pch_pll()
1666 DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll->pll_reg); in intel_disable_pch_pll()
1671 reg = pll->pll_reg; in intel_disable_pch_pll()
[all …]
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| D | i915_drv.h | 119 int pll_reg; member
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| /drivers/mfd/ |
| D | sm501.c | 518 unsigned int pll_reg = 0; in sm501_set_clock() local
543 pll_reg = 0x20000 | (to.k << 15) | (to.n << 8) | to.m; in sm501_set_clock()
616 if (pll_reg) in sm501_set_clock()
617 smc501_writel(pll_reg, in sm501_set_clock()
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