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Searched refs:port_sel (Results 1 – 5 of 5) sorted by relevance

/drivers/block/paride/
Dppc6lnx.c24 #define port_sel 8 macro
137 ppc->cur_ctrl |= port_sel; in ppc6_select()
149 ppc->cur_ctrl &= ~port_sel; in ppc6_select()
164 ppc->cur_ctrl |= port_sel; in ppc6_select()
189 ppc->cur_ctrl &= ~(port_sel | port_init); in ppc6_select()
191 ppc->cur_ctrl &= ~port_sel; in ppc6_select()
213 ppc->cur_ctrl |= port_sel; in ppc6_deselect()
219 outb((ppc->org_ctrl | port_sel), ppc->lpt_addr + 2); in ppc6_deselect()
/drivers/ata/
Dpata_icside.c55 u8 port_sel; member
234 writeb(state->port[ap->port_no].port_sel, state->ioc_base); in pata_icside_bmdma_setup()
421 state->port[0].port_sel = sel; in pata_icside_register_v6()
422 state->port[1].port_sel = sel | 1; in pata_icside_register_v6()
/drivers/rapidio/
Drio.c1267 u32 port_sel = RIO_INVALID_ROUTE; in rio_std_route_clr_table() local
1283 port_sel = (RIO_INVALID_ROUTE << 24) | in rio_std_route_clr_table()
1295 port_sel); in rio_std_route_clr_table()
/drivers/gpu/drm/i915/
Dintel_dp.c2727 u32 pp_on, pp_off, pp_div, port_sel = 0; in intel_dp_init_panel_power_sequencer_registers() local
2742 port_sel = I915_READ(pp_on_reg) & 0xc0000000; in intel_dp_init_panel_power_sequencer_registers()
2759 port_sel = PANEL_POWER_PORT_DP_A; in intel_dp_init_panel_power_sequencer_registers()
2761 port_sel = PANEL_POWER_PORT_DP_D; in intel_dp_init_panel_power_sequencer_registers()
2764 pp_on |= port_sel; in intel_dp_init_panel_power_sequencer_registers()
Dintel_display.c1342 enum pipe pipe, u32 port_sel, u32 val) in dp_pipe_enabled() argument
1350 if ((trans_dp_ctl & TRANS_DP_PORT_SEL_MASK) != port_sel) in dp_pipe_enabled()
1407 enum pipe pipe, int reg, u32 port_sel) in assert_pch_dp_disabled() argument
1410 WARN(dp_pipe_enabled(dev_priv, pipe, port_sel, val), in assert_pch_dp_disabled()