Searched refs:pp_ctrl_reg (Results 1 – 1 of 1) sorted by relevance
266 u32 pp_ctrl_reg; in ironlake_edp_have_panel_vdd() local268 pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL; in ironlake_edp_have_panel_vdd()269 return (I915_READ(pp_ctrl_reg) & EDP_FORCE_VDD) != 0; in ironlake_edp_have_panel_vdd()277 u32 pp_stat_reg, pp_ctrl_reg; in intel_dp_check_edp() local283 pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL; in intel_dp_check_edp()289 I915_READ(pp_ctrl_reg)); in intel_dp_check_edp()922 u32 pp_stat_reg, pp_ctrl_reg; in ironlake_wait_panel_status() local925 pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL; in ironlake_wait_panel_status()930 I915_READ(pp_ctrl_reg)); in ironlake_wait_panel_status()935 I915_READ(pp_ctrl_reg)); in ironlake_wait_panel_status()[all …]