| /drivers/gpu/drm/nouveau/core/engine/graph/fuc/ |
| D | nvc0.fuc | 47 mov $r8 0x83c
48 shl b32 $r8 6
51 iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
55 mov $r8 0x85c
56 shl b32 $r8 6
59 iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
70 ld b32 $r8 D[$r13 + 0x0] // GET
72 xor $r8 8
73 cmpu b32 $r8 $r9
81 and $r8 $r9 7
[all …]
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| D | nve0.fuc | 47 mov $r8 0x83c
48 shl b32 $r8 6
51 iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
55 mov $r8 0x85c
56 shl b32 $r8 6
59 iowr I[$r8 + 0x000] $r9 // CC_SCRATCH[7]
70 ld b32 $r8 D[$r13 + 0x0] // GET
72 xor $r8 8
73 cmpu b32 $r8 $r9
81 and $r8 $r9 7
[all …]
|
| D | gpcnve0.fuc | 308 push $r8
309 mov $r8 $flags
310 push $r8
342 pop $r8
343 mov $flags $r8
344 pop $r8
|
| D | gpcnvc0.fuc | 396 push $r8
397 mov $r8 $flags
398 push $r8
430 pop $r8
431 mov $flags $r8
432 pop $r8
|
| D | hubnvc0.fuc | 465 push $r8
466 mov $r8 $flags
467 push $r8
518 pop $r8
519 mov $flags $r8
520 pop $r8
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| D | hubnve0.fuc | 415 push $r8
416 mov $r8 $flags
417 push $r8
468 pop $r8
469 mov $flags $r8
470 pop $r8
|
| /drivers/power/ |
| D | intel_mid_battery.c | 259 u8 r8; in pmic_battery_read_status() local
280 if (intel_scu_ipc_ioread8(PMIC_BATT_CHR_SCHRGINT_ADDR, &r8)) { in pmic_battery_read_status()
292 if (r8 & PMIC_BATT_CHR_SBATDET_MASK) { in pmic_battery_read_status()
303 if (r8 & PMIC_BATT_CHR_SBATOVP_MASK) { in pmic_battery_read_status()
308 } else if (r8 & PMIC_BATT_CHR_STEMP_MASK) { in pmic_battery_read_status()
315 if (r8 & PMIC_BATT_CHR_SDCLMT_MASK) { in pmic_battery_read_status()
323 if (r8 & PMIC_BATT_CHR_SUSBDET_MASK) { in pmic_battery_read_status()
332 if (r8 & PMIC_BATT_CHR_SUSBOVP_MASK) { in pmic_battery_read_status()
354 if (r8 & PMIC_BATT_CHR_SCOMP_MASK) { in pmic_battery_read_status()
563 u8 r8; in pmic_battery_handle_intrpt() local
[all …]
|
| /drivers/net/wireless/b43/ |
| D | phy_a.c | 102 u16 freq, r8, tmp; in aphy_channel_switch() local
106 r8 = b43_radio_read16(dev, 0x0008); in aphy_channel_switch()
108 b43_radio_write16(dev, 0x0008, r8); in aphy_channel_switch()
121 r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */ in aphy_channel_switch()
123 b43_radio_write16(dev, 0x0007, (r8 << 4) | r8); in aphy_channel_switch()
124 b43_radio_write16(dev, 0x0020, (r8 << 4) | r8); in aphy_channel_switch()
125 b43_radio_write16(dev, 0x0021, (r8 << 4) | r8); in aphy_channel_switch()
126 b43_radio_maskset(dev, 0x0022, 0x000F, (r8 << 4)); in aphy_channel_switch()
127 b43_radio_write16(dev, 0x002A, (r8 << 4)); in aphy_channel_switch()
128 b43_radio_write16(dev, 0x002B, (r8 << 4)); in aphy_channel_switch()
[all …]
|
| D | radio_2055.c | 271 #define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \ argument
281 .radio_pll_lfc2 = r8, \
|
| /drivers/parisc/ |
| D | superio.c | 292 u8 r8; in superio_mask_irq() local
302 r8 = inb(IC_PIC1+1); in superio_mask_irq()
303 r8 |= (1 << irq); in superio_mask_irq()
304 outb (r8,IC_PIC1+1); in superio_mask_irq()
310 u8 r8; in superio_unmask_irq() local
319 r8 = inb(IC_PIC1+1); in superio_unmask_irq()
320 r8 &= ~(1 << irq); in superio_unmask_irq()
321 outb (r8,IC_PIC1+1); in superio_unmask_irq()
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| /drivers/gpu/drm/nouveau/core/engine/copy/fuc/ |
| D | nva3.fuc | 280 add b32 $r8 $r6 0x180
281 shl b32 $r8 8
282 iowr I[$r8] $r7
445 clear b32 $r8
472 st b8 D[$sp + $r8] $r12
473 add b32 $r8 1
484 ld b32 $r8 D[$r0 + #ctx_xcnt]
485 mulu $r6 $r8
492 mulu $r7 $r8
550 extr $r8 $r7 4:7
[all …]
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| /drivers/media/dvb-frontends/ |
| D | stv6110.c | 173 u8 r8, ret = 0x04; in stv6110_set_bandwidth() local
177 r8 = 31; in stv6110_set_bandwidth()
179 r8 = 0; in stv6110_set_bandwidth()
181 r8 = (bandwidth / 2) / 1000000 - 5; in stv6110_set_bandwidth()
186 priv->regs[RSTV6110_CTRL3] |= (r8 & 0x1f); in stv6110_set_bandwidth()
364 u8 r8 = 0; in stv6110_get_bandwidth() local
369 r8 = priv->regs[RSTV6110_CTRL3] & 0x1f; in stv6110_get_bandwidth()
370 *bandwidth = (r8 + 5) * 2000000;/* x2 for ZIF tuner BW/2 = F+5 Mhz */ in stv6110_get_bandwidth()
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| /drivers/gpu/drm/nouveau/core/engine/crypt/fuc/ |
| D | nv98.fuc | 186 add b32 $r8 $r6 0x180
187 shl b32 $r8 8
188 iowr I[$r8] $r7
456 shr b32 $r8 $r5 8
458 or $r4 $r8
464 shr b32 $r8 $r7 8
466 or $r6 $r8
470 ld b32 $r8 D[$r0 + #ctx_mode]
471 shl b32 $r8 2
474 ld b16 $r9 D[$r8 + #crypt_dtable]
[all …]
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| /drivers/misc/sgi-xp/ |
| D | xp_nofault.S | 26 mov r8=r0 // Stage a success return value
34 mov r8=1 // Return value of 1
|
| /drivers/input/touchscreen/ |
| D | intel-mid-touch.c | 453 u8 r8; in mrstouch_chan_parse() local
456 err = intel_scu_ipc_ioread8(PMICADDR0 + i, &r8); in mrstouch_chan_parse()
460 if (r8 == END_OF_CHANNEL) { in mrstouch_chan_parse()
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| /drivers/media/parport/ |
| D | pms.c | 635 unsigned char r8 = 0x5; /* value for reg8 */ in pms_capture() local
638 r8 |= 0x20; /* else use untranslated rgb = 565 */ in pms_capture()
639 mvv_write(dev, 0x08, r8); /* capture rgb555/565, init DRAM, PC enable */ in pms_capture()
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| /drivers/scsi/csiostor/ |
| D | t4fw_api_stor.h | 528 __be64 r8; member
|
| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | t4fw_api.h | 2027 __be64 r8; member
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| /drivers/net/wireless/brcm80211/brcmfmac/ |
| D | dhd_sdio.c | 364 __le32 r8; /* v5 */ member
|