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Searched refs:ranges (Results 1 – 25 of 43) sorted by relevance

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/drivers/media/tuners/
Dtuner-types.c72 .ranges = tuner_temic_pal_ranges,
88 .ranges = tuner_philips_pal_i_ranges,
104 .ranges = tuner_philips_ntsc_ranges,
121 .ranges = tuner_philips_secam_ranges,
138 .ranges = tuner_philips_pal_ranges,
155 .ranges = tuner_temic_ntsc_ranges,
171 .ranges = tuner_temic_pal_i_ranges,
187 .ranges = tuner_temic_4036fy5_ntsc_ranges,
203 .ranges = tuner_alps_tsb_1_ranges,
214 .ranges = tuner_alps_tsb_1_ranges,
[all …]
Dtuner-simple.c266 if (*frequency > t_params->ranges[i].limit) in simple_config_lookup()
272 *frequency, t_params->ranges[i - 1].limit); in simple_config_lookup()
273 *frequency = t_params->ranges[--i].limit; in simple_config_lookup()
275 *config = t_params->ranges[i].config; in simple_config_lookup()
276 *cb = t_params->ranges[i].cb; in simple_config_lookup()
702 buffer[2] = (t_params->ranges[0].config & ~TUNER_RATIO_MASK) | in simple_set_radio_freq()
/drivers/net/wireless/iwlegacy/
D4965-calib.c120 const struct il_sensitivity_ranges *ranges = il->hw_params.sens; in il4965_sens_energy_cck() local
225 data->nrg_th_cck = min((u32) ranges->min_nrg_cck, val); in il4965_sens_energy_cck()
271 min((u32) ranges->auto_corr_max_cck, val); in il4965_sens_energy_cck()
275 min((u32) ranges->auto_corr_max_cck_mrc, val); in il4965_sens_energy_cck()
282 data->auto_corr_cck = max((u32) ranges->auto_corr_min_cck, val); in il4965_sens_energy_cck()
285 max((u32) ranges->auto_corr_min_cck_mrc, val); in il4965_sens_energy_cck()
299 const struct il_sensitivity_ranges *ranges = il->hw_params.sens; in il4965_sens_auto_corr_ofdm() local
311 min((u32) ranges->auto_corr_max_ofdm, val); in il4965_sens_auto_corr_ofdm()
315 min((u32) ranges->auto_corr_max_ofdm_mrc, val); in il4965_sens_auto_corr_ofdm()
319 min((u32) ranges->auto_corr_max_ofdm_x1, val); in il4965_sens_auto_corr_ofdm()
[all …]
/drivers/net/wireless/iwlwifi/dvm/
Dcalib.c193 const struct iwl_sensitivity_ranges *ranges = priv->hw_params.sens; in iwl_sens_energy_cck() local
299 data->nrg_th_cck = min((u32)ranges->min_nrg_cck, val); in iwl_sens_energy_cck()
345 min((u32)ranges->auto_corr_max_cck, val); in iwl_sens_energy_cck()
349 min((u32)ranges->auto_corr_max_cck_mrc, val); in iwl_sens_energy_cck()
357 max((u32)ranges->auto_corr_min_cck, val); in iwl_sens_energy_cck()
360 max((u32)ranges->auto_corr_min_cck_mrc, val); in iwl_sens_energy_cck()
376 const struct iwl_sensitivity_ranges *ranges = priv->hw_params.sens; in iwl_sens_auto_corr_ofdm() local
388 min((u32)ranges->auto_corr_max_ofdm, val); in iwl_sens_auto_corr_ofdm()
392 min((u32)ranges->auto_corr_max_ofdm_mrc, val); in iwl_sens_auto_corr_ofdm()
396 min((u32)ranges->auto_corr_max_ofdm_x1, val); in iwl_sens_auto_corr_ofdm()
[all …]
/drivers/edac/
Damd64_edac.h184 #define dram_intlv_en(pvt, i) ((u8)((pvt->ranges[i].base.lo >> 8) & 0x7))
185 #define dram_rw(pvt, i) ((u8)(pvt->ranges[i].base.lo & 0x3))
186 #define dram_intlv_sel(pvt, i) ((u8)((pvt->ranges[i].lim.lo >> 8) & 0x7))
187 #define dram_dst_node(pvt, i) ((u8)(pvt->ranges[i].lim.lo & 0x7))
359 struct dram_range ranges[DRAM_RANGES]; member
394 u64 addr = ((u64)pvt->ranges[i].base.lo & 0xffff0000) << 8; in get_dram_base()
399 return (((u64)pvt->ranges[i].base.hi & 0x000000ff) << 40) | addr; in get_dram_base()
404 u64 lim = (((u64)pvt->ranges[i].lim.lo & 0xffff0000) << 8) | 0x00ffffff; in get_dram_limit()
409 return (((u64)pvt->ranges[i].lim.hi & 0x000000ff) << 40) | lim; in get_dram_limit()
Damd64_edac.c924 amd64_read_pci_cfg(pvt->F1, DRAM_BASE_LO + off, &pvt->ranges[range].base.lo); in read_dram_base_limit_regs()
925 amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_LO + off, &pvt->ranges[range].lim.lo); in read_dram_base_limit_regs()
933 amd64_read_pci_cfg(pvt->F1, DRAM_BASE_HI + off, &pvt->ranges[range].base.hi); in read_dram_base_limit_regs()
934 amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_HI + off, &pvt->ranges[range].lim.hi); in read_dram_base_limit_regs()
951 pvt->ranges[range].lim.lo &= GENMASK(0, 15); in read_dram_base_limit_regs()
954 pvt->ranges[range].lim.lo |= ((llim & 0x1fff) << 3 | 0x7) << 16; in read_dram_base_limit_regs()
956 pvt->ranges[range].lim.hi &= GENMASK(0, 7); in read_dram_base_limit_regs()
959 pvt->ranges[range].lim.hi |= llim >> 13; in read_dram_base_limit_regs()
/drivers/pinctrl/sh-pfc/
Dpinctrl.c385 const struct pinmux_range *ranges; in sh_pfc_map_pins() local
391 if (pfc->info->ranges == NULL) { in sh_pfc_map_pins()
394 ranges = &def_range; in sh_pfc_map_pins()
397 ranges = pfc->info->ranges; in sh_pfc_map_pins()
414 const struct pinmux_range *range = &ranges[i]; in sh_pfc_map_pins()
430 pfc->nr_pins = ranges[nr_ranges-1].end + 1; in sh_pfc_map_pins()
Dgpio.c337 const struct pinmux_range *ranges; in sh_pfc_register_gpiochip() local
371 if (pfc->info->ranges == NULL) { in sh_pfc_register_gpiochip()
374 ranges = &def_range; in sh_pfc_register_gpiochip()
377 ranges = pfc->info->ranges; in sh_pfc_register_gpiochip()
382 const struct pinmux_range *range = &ranges[i]; in sh_pfc_register_gpiochip()
Dcore.c83 if (pfc->info->ranges == NULL) in sh_pfc_get_pin_index()
87 const struct pinmux_range *range = &pfc->info->ranges[i]; in sh_pfc_get_pin_index()
/drivers/of/
Daddress.c344 const __be32 *ranges; in of_translate_one() local
364 ranges = of_get_property(parent, rprop, &rlen); in of_translate_one()
366 if (ranges == NULL) { in of_translate_one()
371 if (ranges == NULL || rlen == 0) { in of_translate_one()
383 for (; rlen >= rone; rlen -= rone, ranges += rone) { in of_translate_one()
384 offset = bus->map(addr, ranges, na, ns, pna); in of_translate_one()
392 memcpy(addr, ranges + na, 4 * pna); in of_translate_one()
/drivers/gpu/drm/cirrus/
Dcirrus_drv.c47 ap->ranges[0].base = pci_resource_start(pdev, 0); in cirrus_kick_out_firmware_fb()
48 ap->ranges[0].size = pci_resource_len(pdev, 0); in cirrus_kick_out_firmware_fb()
Dcirrus_fbdev.c232 info->apertures->ranges[0].base = cdev->dev->mode_config.fb_base; in cirrusfb_create()
233 info->apertures->ranges[0].size = cdev->mc.vram_size; in cirrusfb_create()
/drivers/gpu/drm/mgag200/
Dmgag200_drv.c52 ap->ranges[0].base = pci_resource_start(pdev, 0); in mgag200_kick_out_firmware_fb()
53 ap->ranges[0].size = pci_resource_len(pdev, 0); in mgag200_kick_out_firmware_fb()
Dmgag200_main.c128 aper->ranges[0].base = mdev->mc.vram_base; in mga_vram_init()
129 aper->ranges[0].size = mdev->mc.vram_window; in mga_vram_init()
Dmgag200_fb.c229 info->apertures->ranges[0].base = mdev->dev->mode_config.fb_base; in mgag200fb_create()
230 info->apertures->ranges[0].size = mdev->mc.vram_size; in mgag200fb_create()
/drivers/gpu/drm/nouveau/
Dnouveau_drm.c249 aper->ranges[0].base = pci_resource_start(pdev, 1); in nouveau_drm_probe()
250 aper->ranges[0].size = pci_resource_len(pdev, 1); in nouveau_drm_probe()
254 aper->ranges[aper->count].base = pci_resource_start(pdev, 2); in nouveau_drm_probe()
255 aper->ranges[aper->count].size = pci_resource_len(pdev, 2); in nouveau_drm_probe()
260 aper->ranges[aper->count].base = pci_resource_start(pdev, 3); in nouveau_drm_probe()
261 aper->ranges[aper->count].size = pci_resource_len(pdev, 3); in nouveau_drm_probe()
/drivers/video/
Dvesafb.c181 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); in vesafb_destroy()
304 info->apertures->ranges[0].base = screen_info.lfb_base; in vesafb_probe()
305 info->apertures->ranges[0].size = size_total; in vesafb_probe()
Defifb.c289 release_mem_region(info->apertures->ranges[0].base, in efifb_destroy()
290 info->apertures->ranges[0].size); in efifb_destroy()
455 info->apertures->ranges[0].base = efifb_fix.smem_start; in efifb_probe()
456 info->apertures->ranges[0].size = size_remap; in efifb_probe()
Doffb.c286 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); in offb_destroy()
505 info->apertures->ranges[0].base = address; in offb_init_fb()
506 info->apertures->ranges[0].size = fix->smem_len; in offb_init_fb()
/drivers/staging/comedi/drivers/
Dcb_pcidas.c254 const struct comedi_lrange *ranges; member
270 .ranges = &cb_pcidas_ranges,
282 .ranges = &cb_pcidas_ranges,
294 .ranges = &cb_pcidas_ranges,
304 .ranges = &cb_pcidas_ranges,
313 .ranges = &cb_pcidas_ranges,
324 .ranges = &cb_pcidas_ranges,
334 .ranges = &cb_pcidas_alt_ranges,
344 .ranges = &cb_pcidas_ranges,
1494 s->range_table = thisboard->ranges; in cb_pcidas_auto_attach()
/drivers/gpu/drm/i915/
Dintel_fb.c138 info->apertures->ranges[0].base = dev->mode_config.fb_base; in intelfb_create()
139 info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; in intelfb_create()
/drivers/gpu/drm/ast/
Dast_fb.c252 info->apertures->ranges[0].base = pci_resource_start(dev->pdev, 0); in astfb_create()
253 info->apertures->ranges[0].size = pci_resource_len(dev->pdev, 0); in astfb_create()
/drivers/gpu/drm/radeon/
Dradeon_fb.c266 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; in radeonfb_create()
267 info->apertures->ranges[0].size = rdev->mc.aper_size; in radeonfb_create()
Dradeon_drv.c320 ap->ranges[0].base = pci_resource_start(pdev, 0); in radeon_kick_out_firmware_fb()
321 ap->ranges[0].size = pci_resource_len(pdev, 0); in radeon_kick_out_firmware_fb()
/drivers/base/regmap/
Dregmap.c55 const struct regmap_range *ranges, in regmap_reg_in_ranges() argument
61 for (i = 0, r = ranges; i < nranges; i++, r++) in regmap_reg_in_ranges()
648 const struct regmap_range_cfg *range_cfg = &config->ranges[i]; in regmap_init()
679 unsigned sel_reg = config->ranges[j].selector_reg; in regmap_init()
680 unsigned win_min = config->ranges[j].window_start; in regmap_init()
682 config->ranges[j].window_len - 1; in regmap_init()

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