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Searched refs:rtc_base (Results 1 – 5 of 5) sorted by relevance

/drivers/rtc/
Drtc-tegra.c61 void __iomem *rtc_base; /* NULL if not initialized. */ member
73 return readl(info->rtc_base + TEGRA_RTC_REG_BUSY) & 1; in tegra_rtc_check_busy()
117 msec = readl(info->rtc_base + TEGRA_RTC_REG_MILLI_SECONDS); in tegra_rtc_read_time()
118 sec = readl(info->rtc_base + TEGRA_RTC_REG_SHADOW_SECONDS); in tegra_rtc_read_time()
163 writel(sec, info->rtc_base + TEGRA_RTC_REG_SECONDS); in tegra_rtc_set_time()
166 readl(info->rtc_base + TEGRA_RTC_REG_SECONDS)); in tegra_rtc_set_time()
177 sec = readl(info->rtc_base + TEGRA_RTC_REG_SECONDS_ALARM0); in tegra_rtc_read_alarm()
194 tmp = readl(info->rtc_base + TEGRA_RTC_REG_INTR_STATUS); in tegra_rtc_read_alarm()
210 status = readl(info->rtc_base + TEGRA_RTC_REG_INTR_MASK); in tegra_rtc_alarm_irq_enable()
216 writel(status, info->rtc_base + TEGRA_RTC_REG_INTR_MASK); in tegra_rtc_alarm_irq_enable()
[all …]
Drtc-pm8xxx.c52 int rtc_base; member
128 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, in pm8xxx_rtc_set_time()
164 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, in pm8xxx_rtc_set_time()
258 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1); in pm8xxx_rtc_set_alarm()
319 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1); in pm8xxx_rtc_alarm_irq_enable()
354 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1); in pm8xxx_alarm_trigger()
366 rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base + in pm8xxx_alarm_trigger()
375 rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base + in pm8xxx_alarm_trigger()
422 rtc_dd->rtc_base = rtc_resource->start; in pm8xxx_rtc_probe()
425 rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET; in pm8xxx_rtc_probe()
[all …]
Drtc-omap.c105 static void __iomem *rtc_base; variable
107 #define rtc_read(addr) readb(rtc_base + (addr))
108 #define rtc_write(val, addr) writeb(val, rtc_base + (addr))
110 #define rtc_writel(val, addr) writel(val, rtc_base + (addr))
350 rtc_base = devm_ioremap_resource(&pdev->dev, res); in omap_rtc_probe()
351 if (IS_ERR(rtc_base)) in omap_rtc_probe()
352 return PTR_ERR(rtc_base); in omap_rtc_probe()
Drtc-lpc32xx.c53 __raw_readl((dev)->rtc_base + (reg))
55 __raw_writel((val), (dev)->rtc_base + (reg))
58 void __iomem *rtc_base; member
235 rtc->rtc_base = devm_ioremap(&pdev->dev, res->start, size); in lpc32xx_rtc_probe()
236 if (!rtc->rtc_base) { in lpc32xx_rtc_probe()
/drivers/clocksource/
Dtegra20_timer.c51 static void __iomem *rtc_base; variable
114 u32 ms = readl(rtc_base + RTC_MILLISECONDS); in tegra_rtc_read_ms()
115 u32 s = readl(rtc_base + RTC_SHADOW_SECONDS); in tegra_rtc_read_ms()
228 rtc_base = of_iomap(np, 0); in tegra20_init_rtc()
229 if (!rtc_base) { in tegra20_init_rtc()