/drivers/gpu/drm/omapdrm/ |
D | omap_fbdev.c | 137 struct drm_fb_helper_surface_size *sizes) in omap_fbdev_create() argument 152 sizes->surface_bpp = 32; in omap_fbdev_create() 153 sizes->surface_depth = 32; in omap_fbdev_create() 155 DBG("create fbdev: %dx%d@%d (%dx%d)", sizes->surface_width, in omap_fbdev_create() 156 sizes->surface_height, sizes->surface_bpp, in omap_fbdev_create() 157 sizes->fb_width, sizes->fb_height); in omap_fbdev_create() 159 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in omap_fbdev_create() 160 sizes->surface_depth); in omap_fbdev_create() 162 mode_cmd.width = sizes->surface_width; in omap_fbdev_create() 163 mode_cmd.height = sizes->surface_height; in omap_fbdev_create() [all …]
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/drivers/gpu/drm/i915/ |
D | intel_fb.c | 61 struct drm_fb_helper_surface_size *sizes) in intelfb_create() argument 74 if (sizes->surface_bpp == 24) in intelfb_create() 75 sizes->surface_bpp = 32; in intelfb_create() 77 mode_cmd.width = sizes->surface_width; in intelfb_create() 78 mode_cmd.height = sizes->surface_height; in intelfb_create() 80 mode_cmd.pitches[0] = ALIGN(mode_cmd.width * ((sizes->surface_bpp + 7) / in intelfb_create() 82 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in intelfb_create() 83 sizes->surface_depth); in intelfb_create() 157 drm_fb_helper_fill_var(info, &ifbdev->helper, sizes->fb_width, sizes->fb_height); in intelfb_create()
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/drivers/gpu/drm/ |
D | drm_fb_helper.c | 855 struct drm_fb_helper_surface_size sizes; in drm_fb_helper_single_fb_probe() local 858 memset(&sizes, 0, sizeof(struct drm_fb_helper_surface_size)); in drm_fb_helper_single_fb_probe() 859 sizes.surface_depth = 24; in drm_fb_helper_single_fb_probe() 860 sizes.surface_bpp = 32; in drm_fb_helper_single_fb_probe() 861 sizes.fb_width = (unsigned)-1; in drm_fb_helper_single_fb_probe() 862 sizes.fb_height = (unsigned)-1; in drm_fb_helper_single_fb_probe() 866 if (preferred_bpp != sizes.surface_bpp) in drm_fb_helper_single_fb_probe() 867 sizes.surface_depth = sizes.surface_bpp = preferred_bpp; in drm_fb_helper_single_fb_probe() 879 sizes.surface_depth = sizes.surface_bpp = 8; in drm_fb_helper_single_fb_probe() 882 sizes.surface_depth = 15; in drm_fb_helper_single_fb_probe() [all …]
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D | drm_fb_cma_helper.c | 249 struct drm_fb_helper_surface_size *sizes) in drm_fbdev_cma_create() argument 263 sizes->surface_width, sizes->surface_height, in drm_fbdev_cma_create() 264 sizes->surface_bpp); in drm_fbdev_cma_create() 266 bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); in drm_fbdev_cma_create() 268 mode_cmd.width = sizes->surface_width; in drm_fbdev_cma_create() 269 mode_cmd.height = sizes->surface_height; in drm_fbdev_cma_create() 270 mode_cmd.pitches[0] = sizes->surface_width * bytes_per_pixel; in drm_fbdev_cma_create() 271 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in drm_fbdev_cma_create() 272 sizes->surface_depth); in drm_fbdev_cma_create()
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/drivers/gpu/drm/exynos/ |
D | exynos_drm_fbdev.c | 140 struct drm_fb_helper_surface_size *sizes) in exynos_drm_fbdev_create() argument 154 sizes->surface_width, sizes->surface_height, in exynos_drm_fbdev_create() 155 sizes->surface_bpp); in exynos_drm_fbdev_create() 157 mode_cmd.width = sizes->surface_width; in exynos_drm_fbdev_create() 158 mode_cmd.height = sizes->surface_height; in exynos_drm_fbdev_create() 159 mode_cmd.pitches[0] = sizes->surface_width * (sizes->surface_bpp >> 3); in exynos_drm_fbdev_create() 160 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in exynos_drm_fbdev_create() 161 sizes->surface_depth); in exynos_drm_fbdev_create()
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/drivers/gpu/drm/vmwgfx/ |
D | vmwgfx_surface.c | 208 src_size = srf->sizes; in vmw_surface_define_encode() 242 const struct drm_vmw_size *cur_size = &srf->sizes[i]; in vmw_surface_dma_encode() 600 kfree(srf->sizes); in vmw_user_surface_free() 728 srf->sizes = kmalloc(srf->num_sizes * sizeof(*srf->sizes), GFP_KERNEL); in vmw_surface_define_ioctl() 729 if (unlikely(srf->sizes == NULL)) { in vmw_surface_define_ioctl() 735 if (unlikely(srf->sizes == NULL)) { in vmw_surface_define_ioctl() 743 ret = copy_from_user(srf->sizes, user_sizes, in vmw_surface_define_ioctl() 744 srf->num_sizes * sizeof(*srf->sizes)); in vmw_surface_define_ioctl() 750 srf->base_size = *srf->sizes; in vmw_surface_define_ioctl() 756 cur_size = srf->sizes; in vmw_surface_define_ioctl() [all …]
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/drivers/gpu/drm/radeon/ |
D | radeon_fb.c | 191 struct drm_fb_helper_surface_size *sizes) in radeonfb_create() argument 204 mode_cmd.width = sizes->surface_width; in radeonfb_create() 205 mode_cmd.height = sizes->surface_height; in radeonfb_create() 208 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) in radeonfb_create() 209 sizes->surface_bpp = 32; in radeonfb_create() 211 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in radeonfb_create() 212 sizes->surface_depth); in radeonfb_create() 258 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); in radeonfb_create()
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/drivers/gpu/drm/mgag200/ |
D | mgag200_fb.c | 158 struct drm_fb_helper_surface_size *sizes) in mgag200fb_create() argument 173 mode_cmd.width = sizes->surface_width; in mgag200fb_create() 174 mode_cmd.height = sizes->surface_height; in mgag200fb_create() 175 mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8); in mgag200fb_create() 177 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in mgag200fb_create() 178 sizes->surface_depth); in mgag200fb_create() 233 drm_fb_helper_fill_var(info, &mfbdev->helper, sizes->fb_width, in mgag200fb_create() 234 sizes->fb_height); in mgag200fb_create()
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/drivers/gpu/drm/gma500/ |
D | framebuffer.c | 340 struct drm_fb_helper_surface_size *sizes) in psbfb_create() argument 356 mode_cmd.width = sizes->surface_width; in psbfb_create() 357 mode_cmd.height = sizes->surface_height; in psbfb_create() 358 bpp = sizes->surface_bpp; in psbfb_create() 359 depth = sizes->surface_depth; in psbfb_create() 471 sizes->fb_width, sizes->fb_height); in psbfb_create() 543 struct drm_fb_helper_surface_size *sizes) in psbfb_probe() argument 550 bytespp = sizes->surface_bpp / 8; in psbfb_probe() 557 if (ALIGN(sizes->fb_width * bytespp, 64) * sizes->fb_height > in psbfb_probe() 559 sizes->surface_bpp = 16; in psbfb_probe() [all …]
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/drivers/s390/block/ |
D | xpram.c | 66 static char *sizes[XPRAM_MAX_DEVS]; variable 69 module_param_array(sizes, charp, NULL, 0); 73 MODULE_PARM_DESC(sizes, "list of device (partition) sizes " \ 277 if (sizes[i]) { in xpram_setup_sizes() 278 size = simple_strtoull(sizes[i], &sizes[i], 0); in xpram_setup_sizes() 279 switch (sizes[i][0]) { in xpram_setup_sizes()
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/drivers/gpu/drm/ast/ |
D | ast_fb.c | 186 struct drm_fb_helper_surface_size *sizes) in astfb_create() argument 198 mode_cmd.width = sizes->surface_width; in astfb_create() 199 mode_cmd.height = sizes->surface_height; in astfb_create() 200 mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7)/8); in astfb_create() 202 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in astfb_create() 203 sizes->surface_depth); in astfb_create() 256 drm_fb_helper_fill_var(info, &afbdev->helper, sizes->fb_width, sizes->fb_height); in astfb_create()
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/drivers/gpu/drm/cirrus/ |
D | cirrus_fbdev.c | 160 struct drm_fb_helper_surface_size *sizes) in cirrusfb_create() argument 174 mode_cmd.width = sizes->surface_width; in cirrusfb_create() 175 mode_cmd.height = sizes->surface_height; in cirrusfb_create() 176 mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8); in cirrusfb_create() 177 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in cirrusfb_create() 178 sizes->surface_depth); in cirrusfb_create() 223 drm_fb_helper_fill_var(info, &gfbdev->helper, sizes->fb_width, in cirrusfb_create() 224 sizes->fb_height); in cirrusfb_create()
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/drivers/gpu/host1x/drm/ |
D | fb.c | 170 struct drm_fb_helper_surface_size *sizes) in tegra_fbdev_probe() argument 183 bytes_per_pixel = DIV_ROUND_UP(sizes->surface_bpp, 8); in tegra_fbdev_probe() 185 cmd.width = sizes->surface_width; in tegra_fbdev_probe() 186 cmd.height = sizes->surface_height; in tegra_fbdev_probe() 187 cmd.pitches[0] = sizes->surface_width * bytes_per_pixel; in tegra_fbdev_probe() 188 cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in tegra_fbdev_probe() 189 sizes->surface_depth); in tegra_fbdev_probe()
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/drivers/gpu/drm/qxl/ |
D | qxl_fb.c | 361 struct drm_fb_helper_surface_size *sizes) in qxlfb_create() argument 372 int bpp = sizes->surface_bpp; in qxlfb_create() 373 int depth = sizes->surface_depth; in qxlfb_create() 376 mode_cmd.width = sizes->surface_width; in qxlfb_create() 377 mode_cmd.height = sizes->surface_height; in qxlfb_create() 430 drm_fb_helper_fill_var(info, &qfbdev->helper, sizes->fb_width, in qxlfb_create() 431 sizes->fb_height); in qxlfb_create() 485 struct drm_fb_helper_surface_size *sizes) in qxl_fb_find_or_create_single() argument 492 ret = qxlfb_create(qfbdev, sizes); in qxl_fb_find_or_create_single()
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/drivers/gpu/drm/nouveau/ |
D | nouveau_fbcon.c | 255 struct drm_fb_helper_surface_size *sizes) in nouveau_fbcon_create() argument 270 mode_cmd.width = sizes->surface_width; in nouveau_fbcon_create() 271 mode_cmd.height = sizes->surface_height; in nouveau_fbcon_create() 273 mode_cmd.pitches[0] = mode_cmd.width * (sizes->surface_bpp >> 3); in nouveau_fbcon_create() 276 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in nouveau_fbcon_create() 277 sizes->surface_depth); in nouveau_fbcon_create() 356 drm_fb_helper_fill_var(info, &fbcon->helper, sizes->fb_width, sizes->fb_height); in nouveau_fbcon_create()
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/drivers/gpu/drm/udl/ |
D | udl_fb.c | 480 struct drm_fb_helper_surface_size *sizes) in udlfb_create() argument 492 if (sizes->surface_bpp == 24) in udlfb_create() 493 sizes->surface_bpp = 32; in udlfb_create() 495 mode_cmd.width = sizes->surface_width; in udlfb_create() 496 mode_cmd.height = sizes->surface_height; in udlfb_create() 497 mode_cmd.pitches[0] = mode_cmd.width * ((sizes->surface_bpp + 7) / 8); in udlfb_create() 499 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, in udlfb_create() 500 sizes->surface_depth); in udlfb_create() 540 drm_fb_helper_fill_var(info, &ufbdev->helper, sizes->fb_width, sizes->fb_height); in udlfb_create()
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/drivers/crypto/nx/ |
D | nx-842.c | 51 int sizes[0]; /* size of compressed blocks */ member 57 hdr->blocks_nr * sizeof(hdr->sizes[0]); in nx842_header_size() 455 hdr->sizes[i] = -max_sync_size; in nx842_compress() 466 hdr->sizes[i] = size; in nx842_compress() 581 if (hdr->sizes[i] < 0) { in nx842_decompress() 583 size = abs(hdr->sizes[i]); in nx842_decompress() 598 ((inbuf + hdr->sizes[i] - 1) & NX842_HW_PAGE_MASK))) { in nx842_decompress() 601 op.inlen = hdr->sizes[i]; in nx842_decompress() 604 nx842_build_scatterlist(inbuf, hdr->sizes[i] , &slin); in nx842_decompress() 644 inbuf += hdr->sizes[i]; in nx842_decompress() [all …]
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/drivers/crypto/ux500/ |
D | Kconfig | 13 AES-ECB, CBC and CTR with keys sizes of 128, 192 and 256 bit sizes.
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/drivers/media/usb/em28xx/ |
D | em28xx-vbi.c | 46 unsigned int sizes[], void *alloc_ctxs[]) in vbi_queue_setup() argument 64 sizes[0] = size; in vbi_queue_setup()
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/drivers/media/platform/ |
D | via-camera.c | 1149 struct v4l2_frmsizeenum *sizes) in viacam_enum_framesizes() argument 1151 if (sizes->index != 0) in viacam_enum_framesizes() 1153 sizes->type = V4L2_FRMSIZE_TYPE_CONTINUOUS; in viacam_enum_framesizes() 1154 sizes->stepwise.min_width = QCIF_WIDTH; in viacam_enum_framesizes() 1155 sizes->stepwise.min_height = QCIF_HEIGHT; in viacam_enum_framesizes() 1156 sizes->stepwise.max_width = VGA_WIDTH; in viacam_enum_framesizes() 1157 sizes->stepwise.max_height = VGA_HEIGHT; in viacam_enum_framesizes() 1158 sizes->stepwise.step_width = sizes->stepwise.step_height = 1; in viacam_enum_framesizes()
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/drivers/media/parport/ |
D | bw-qcam.c | 648 unsigned int sizes[], void *alloc_ctxs[]) in queue_setup() argument 657 sizes[0] = fmt->fmt.pix.width * fmt->fmt.pix.height; in queue_setup() 659 sizes[0] = (dev->width / dev->transfer_scale) * in queue_setup() 844 static const struct v4l2_frmsize_discrete sizes[] = { in qcam_enum_framesizes() local 856 fsize->discrete = sizes[fsize->index]; in qcam_enum_framesizes()
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/drivers/usb/gadget/ |
D | uvc_queue.c | 45 unsigned int sizes[], void *alloc_ctxs[]) in uvc_queue_setup() argument 55 sizes[0] = video->imagesize; in uvc_queue_setup()
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/drivers/media/usb/uvc/ |
D | uvc_queue.c | 45 unsigned int sizes[], void *alloc_ctxs[]) in uvc_queue_setup() argument 56 sizes[0] = stream->ctrl.dwMaxVideoFrameSize; in uvc_queue_setup()
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/drivers/media/platform/soc_camera/ |
D | mx3_camera.c | 191 unsigned int sizes[], void *alloc_ctxs[]) in mx3_videobuf_setup() argument 221 sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret); in mx3_videobuf_setup() 224 sizes[0] = icd->sizeimage; in mx3_videobuf_setup() 237 sizes[0] * *count + mx3_cam->buf_total > MAX_VIDEO_MEM * 1024 * 1024) in mx3_videobuf_setup() 239 sizes[0]; in mx3_videobuf_setup()
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/drivers/platform/goldfish/ |
D | goldfish_pipe_v2.c | 157 u32 sizes[MAX_BUFFERS_PER_COMMAND]; /* buffer sizes, guest -> host */ member 306 command->rw_params.sizes[0] = size_on_page; in populate_rw_params() 311 command->rw_params.sizes[buffer_idx] += size_on_page; in populate_rw_params() 315 command->rw_params.sizes[buffer_idx] = size_on_page; in populate_rw_params()
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