Home
last modified time | relevance | path

Searched refs:sync_period (Results 1 – 7 of 7) sorted by relevance

/drivers/scsi/
Ddc395x.c288 u8 sync_period; /* for reg. */ member
1045 if (dcb->sync_period & WIDE_SYNC && in build_srb()
1281 dcb->sync_period = 0; in reset_dev_param()
1547 DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); in start_scsi()
2086 if (dcb->sync_period & WIDE_SYNC) in data_out_phase0()
2093 (dcb->sync_period & WIDE_SYNC) ? "words" : "bytes", in data_out_phase0()
2116 if (d_left_counter == 1 && dcb->sync_period & WIDE_SYNC in data_out_phase0()
2144 (dcb->sync_period & WIDE_SYNC) ? 2 : 1; in data_out_phase0()
2244 << ((srb->dcb->sync_period & WIDE_SYNC) ? 1 : in data_in_phase0()
2251 (srb->dcb->sync_period & WIDE_SYNC) ? "words" : "bytes", in data_in_phase0()
[all …]
Dmac53c94.h54 #define sync_period seqstep macro
Dmac53c94.c136 writeb(0, &regs->sync_period); in mac53c94_init()
168 writeb(0, &regs->sync_period); in mac53c94_start()
Dqla1280.c1182 mb[3] |= nv->bus[bus].target[target].sync_period; in qla1280_set_target_parameters()
2042 nv->bus[bus].target[target].sync_period = 9; in qla1280_set_target_defaults()
2049 nv->bus[bus].target[target].sync_period = 10; in qla1280_set_target_defaults()
2131 mb[3] |= nv->bus[bus].target[target].sync_period; in qla1280_config_target()
Dqla1280.h467 uint8_t sync_period; /* 42 */ member
/drivers/scsi/sym53c8xx_2/
Dsym_nvram.h108 u_short sync_period; /* 4*period factor */ member
Dsym_nvram.c107 tp->usr_period = (tn->sync_period + 3) / 4; in sym_Symbios_setup_target()
180 tn->sync_period / 4, in sym_display_Symbios_nvram()