Home
last modified time | relevance | path

Searched refs:t3_read_reg (Results 1 – 8 of 8) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb3/
Dxgmac.c61 t3_read_reg(adap, ctrl); in xaui_serdes_reset()
103 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ in t3_mac_reset()
140 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ in t3_mac_reset()
168 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ in t3b2_mac_reset()
172 store = t3_read_reg(adap, A_TP_TX_DROP_CFG_CH0 + idx); in t3b2_mac_reset()
190 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ in t3b2_mac_reset()
200 t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ in t3b2_mac_reset()
269 u32 v = t3_read_reg(mac->adapter, reg); in t3_mac_disable_exact_filters()
272 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */ in t3_mac_disable_exact_filters()
280 u32 v = t3_read_reg(mac->adapter, reg); in t3_mac_enable_exact_filters()
[all …]
Dt3_hw.c59 u32 val = t3_read_reg(adapter, reg); in t3_wait_op_done_val()
106 u32 v = t3_read_reg(adapter, addr) & ~mask; in t3_set_reg_field()
109 t3_read_reg(adapter, addr); /* flush */ in t3_set_reg_field()
130 *vals++ = t3_read_reg(adap, data_reg); in t3_read_indirect()
168 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_OP); in t3_mc7_bd_read()
170 val = t3_read_reg(adap, in t3_mc7_bd_read()
175 val = t3_read_reg(adap, mc7->offset + A_MC7_BD_DATA1); in t3_mc7_bd_read()
177 val64 = t3_read_reg(adap, in t3_mc7_bd_read()
223 ret = t3_read_reg(adapter, A_MI1_DATA); in t3_mi1_read()
286 ret = t3_read_reg(adapter, A_MI1_DATA); in mi1_ext_read()
[all …]
Dmc5.c119 *v1 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA0); in dbgi_rd_rsp3()
120 *v2 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA1); in dbgi_rd_rsp3()
121 *v3 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA2); in dbgi_rd_rsp3()
151 unsigned int server_base = t3_read_reg(adap, A_MC5_DB_SERVER_INDEX); in init_mask_data_array()
338 cfg = t3_read_reg(adap, A_MC5_DB_CONFIG) & ~F_TMMODE; in t3_mc5_init()
386 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE); in t3_mc5_intr_handler()
427 u32 cfg = t3_read_reg(adapter, A_MC5_DB_CONFIG); in t3_mc5_prep()
Dcxgb3_offload.c214 uiip->llimit = t3_read_reg(adapter, A_ULPRX_ISCSI_LLIMIT); in cxgb_ulp_iscsi_ctl()
215 uiip->ulimit = t3_read_reg(adapter, A_ULPRX_ISCSI_ULIMIT); in cxgb_ulp_iscsi_ctl()
216 uiip->tagmask = t3_read_reg(adapter, A_ULPRX_ISCSI_TAGMASK); in cxgb_ulp_iscsi_ctl()
218 val = t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ); in cxgb_ulp_iscsi_ctl()
222 val = t3_read_reg(adapter, A_TP_PARA_REG7); in cxgb_ulp_iscsi_ctl()
231 t3_read_reg(adapter, A_PM1_TX_CFG) >> 17); in cxgb_ulp_iscsi_ctl()
235 val = t3_read_reg(adapter, A_TP_PARA_REG2); in cxgb_ulp_iscsi_ctl()
249 ((t3_read_reg(adapter, A_TP_PARA_REG2)) >> in cxgb_ulp_iscsi_ctl()
258 if (val && (val != t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ))) { in cxgb_ulp_iscsi_ctl()
287 t3_read_reg(adapter, A_ULPTX_TPT_LLIMIT); in cxgb_rdma_ctl()
[all …]
Dael1002.c902 status = t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
904 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
906 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
908 t3_read_reg(phy->adapter, in xaui_direct_get_link_status()
Dcxgb3_main.c216 t3_read_reg(adap, A_XGM_INT_STATUS + in t3_os_link_fault()
270 t3_read_reg(adapter, A_XGM_INT_STATUS + in t3_os_link_changed()
286 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); in t3_os_link_changed()
294 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); in t3_os_link_changed()
811 v = t3_read_reg(adap, A_TP_TM_PIO_DATA); in tm_attr_show()
1458 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset); in __cxgb_close()
1732 *p++ = t3_read_reg(ap, start); in reg_block_dump()
2645 t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset); in check_link_status()
2724 cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset); in t3_adap_check_task()
2737 status = t3_read_reg(adapter, A_SG_INT_CAUSE); in t3_adap_check_task()
[all …]
Dadapter.h271 static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr) in t3_read_reg() function
Dsge.c2681 t3_read_reg(adap, A_PL_CLI); /* flush */ in t3_intr()
2711 map = t3_read_reg(adap, A_SG_DATA_INTR); in t3b_intr()
2746 map = t3_read_reg(adap, A_SG_DATA_INTR); in t3b_intr_napi()
2803 unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE) & in t3_sge_err_intr_handler()
2817 v = t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS); in t3_sge_err_intr_handler()
2914 status = t3_read_reg(adap, A_SG_RSPQ_FL_STATUS); in sge_timer_rx()