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Searched refs:timers (Results 1 – 16 of 16) sorted by relevance

/drivers/clocksource/
Dbcm_kona_timer.c42 static struct kona_bcm_timers timers; variable
122 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timers_init()
125 timers.tmr_regs = of_iomap(node, 0); in kona_timers_init()
127 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timers_init()
146 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
149 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
152 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
154 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
169 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_set_mode()
191 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
[all …]
DKconfig88 This option enables support for the Meta per-thread timers.
/drivers/char/
Dmmtimer.c248 static struct mmtimer_node *timers; variable
264 struct rb_node **link = &timers[nodeid].timer_head.rb_node; in mmtimer_add_list()
286 rb_insert_color(&n->list, &timers[nodeid].timer_head); in mmtimer_add_list()
288 if (!timers[nodeid].next || expires < rb_entry(timers[nodeid].next, in mmtimer_add_list()
290 timers[nodeid].next = &n->list; in mmtimer_add_list()
299 struct mmtimer_node *n = &timers[nodeid]; in mmtimer_set_next_timer()
532 spin_lock(&timers[indx].lock); in mmtimer_interrupt()
533 base = rb_entry(timers[indx].next, struct mmtimer, list); in mmtimer_interrupt()
535 spin_unlock(&timers[indx].lock); in mmtimer_interrupt()
546 tasklet_schedule(&timers[indx].tasklet); in mmtimer_interrupt()
[all …]
DKconfig539 open selects one of the timers supported by the HPET. The timers are
/drivers/misc/
Dcs5535-mfgpt.c294 int timers = 0; in scan_timers() local
311 timers++; in scan_timers()
316 return timers; in scan_timers()
DKconfig242 drivers that need timers. MFGPTs are available in the CS5535 and
245 than the generic PIT, and are suitable for use as high-res timers.
267 generic PIT, and are suitable for use as high-res timers.
/drivers/net/wireless/brcm80211/brcmsmac/
Dmac80211_if.c320 for (t = wl->timers; t; t = next) { in brcms_free()
1476 t->next = wl->timers; in brcms_init_timer()
1477 wl->timers = t; in brcms_init_timer()
1543 if (wl->timers == t) { in brcms_free_timer()
1544 wl->timers = wl->timers->next; in brcms_free_timer()
1553 tmp = wl->timers; in brcms_free_timer()
Dmac80211_if.h78 struct brcms_timer *timers; /* timer cleanup queue */ member
/drivers/isdn/hardware/mISDN/
Dhfcsusb.c644 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
651 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
654 hw->timers |= NT_ACTIVATION_TIMER; in ph_state_nt()
662 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
670 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
1366 && (hw->timers & NT_ACTIVATION_TIMER)) { in tx_iso_complete()
Dhfcsusb.h303 __u8 timers; member
/drivers/net/ethernet/chelsio/cxgb3/
Dt3_hw.c2574 unsigned int timers = 0, timers_shift = 22; in partition_mem() local
2578 timers = 1; in partition_mem()
2581 timers = 2; in partition_mem()
2584 timers = 3; in partition_mem()
2611 t3_write_reg(adap, A_TP_CMM_TIMER_BASE, V_CMTIMERMAXNUM(timers) | m); in partition_mem()
/drivers/net/wireless/ath/ath9k/
Dhw.c3025 timer_table->timers[timer_index] = timer; in ath_gen_timer_alloc()
3123 timer_table->timers[timer->index] = NULL; in ath_gen_timer_free()
3148 timer = timer_table->timers[index]; in ath_gen_timer_isr()
3157 timer = timer_table->timers[index]; in ath_gen_timer_isr()
Dhw.h542 struct ath_gen_timer *timers[ATH_MAX_GEN_TIMER]; member
/drivers/media/rc/
DKconfig299 The driver uses omap DM timers for generating the carrier
/drivers/watchdog/
DKconfig1052 SoC processors. There are apparently two watchdog timers
1228 This is the driver for the hardware watchdog timers present on
/drivers/rtc/
DKconfig978 (Real Time Timer). These timers are powered by the backup power