Home
last modified time | relevance | path

Searched refs:v5 (Results 1 – 6 of 6) sorted by relevance

/drivers/char/mwave/
Dmwavedd.h99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument
111 printk(s,v1,v2,v3,v4,v5,v6,v7); \
120 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) argument
121 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) argument
122 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) argument
/drivers/gpu/drm/radeon/
Datombios_encoders.c949 DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 v5; member
1249 args.v5.ucAction = action; in atombios_dig_transmitter_setup()
1251 args.v5.usSymClock = cpu_to_le16(dp_clock / 10); in atombios_dig_transmitter_setup()
1253 args.v5.usSymClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_transmitter_setup()
1258 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB; in atombios_dig_transmitter_setup()
1260 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA; in atombios_dig_transmitter_setup()
1264 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD; in atombios_dig_transmitter_setup()
1266 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYC; in atombios_dig_transmitter_setup()
1270 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYF; in atombios_dig_transmitter_setup()
1272 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYE; in atombios_dig_transmitter_setup()
[all …]
Datombios_crtc.c709 PIXEL_CLOCK_PARAMETERS_V5 v5; member
737 args.v5.ucCRTC = ATOM_CRTC_INVALID; in atombios_crtc_set_disp_eng_pll()
738 args.v5.usPixelClock = cpu_to_le16(dispclk); in atombios_crtc_set_disp_eng_pll()
739 args.v5.ucPpll = ATOM_DCPLL; in atombios_crtc_set_disp_eng_pll()
833 args.v5.ucCRTC = crtc_id; in atombios_crtc_program_pll()
834 args.v5.usPixelClock = cpu_to_le16(clock / 10); in atombios_crtc_program_pll()
835 args.v5.ucRefDiv = ref_div; in atombios_crtc_program_pll()
836 args.v5.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
837 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); in atombios_crtc_program_pll()
838 args.v5.ucPostDiv = post_div; in atombios_crtc_program_pll()
[all …]
Dradeon_atombios.c2669 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5; member
2735 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers()
2737 args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN; in radeon_atom_get_clock_dividers()
2741 dividers->post_div = args.v5.ucPostDiv; in radeon_atom_get_clock_dividers()
2742 dividers->enable_post_div = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
2744 dividers->enable_dithen = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
2746 dividers->whole_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDiv); in radeon_atom_get_clock_dividers()
2747 dividers->frac_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDivFrac); in radeon_atom_get_clock_dividers()
2748 dividers->ref_div = args.v5.ucRefDiv; in radeon_atom_get_clock_dividers()
2749 dividers->vco_mode = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
/drivers/video/sis/
Dsis_main.c4317 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; in sisfb_post_sis300() local
4338 v4 = 0x44; v5 = 0x42; in sisfb_post_sis300()
4341 v4 = 0x68; v5 = 0x43; /* Assume 125Mhz ECLK */ in sisfb_post_sis300()
4350 v5 = bios[rindex++]; in sisfb_post_sis300()
4358 SiS_SetReg(SISSR, 0x2f, v5); in sisfb_post_sis300()
4369 v5 = 0x06; v6 = 0x00; v7 = 0x00; v8 = 0x00; in sisfb_post_sis300()
4376 v5 = bios[memtype + 32]; in sisfb_post_sis300()
4387 SiS_SetReg(SISSR, 0x19, v5); in sisfb_post_sis300()
4431 v4 = 0x00; v5 = 0x00; v6 = 0x10; in sisfb_post_sis300()
4434 v5 = bios[0xf6]; in sisfb_post_sis300()
[all …]
/drivers/staging/wlags49_h2/
Dhcf.c424 hcf_16 v5; // /* HCF_DLV | HCF_DLNV */ member