/drivers/clk/spear/ |
D | clk-vco-pll.c | 97 for (*index = 0; *index < pll->vco->rtbl_cnt; (*index)++) { in clk_pll_round_rate_index() 100 *prate = pll_calc_rate(pll->vco->rtbl, vco_parent_rate, *index, in clk_pll_round_rate_index() 131 if (pll->vco->lock) in clk_pll_recalc_rate() 132 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_recalc_rate() 134 p = readl_relaxed(pll->vco->cfg_reg); in clk_pll_recalc_rate() 136 if (pll->vco->lock) in clk_pll_recalc_rate() 137 spin_unlock_irqrestore(pll->vco->lock, flags); in clk_pll_recalc_rate() 148 struct pll_rate_tbl *rtbl = pll->vco->rtbl; in clk_pll_set_rate() 154 if (pll->vco->lock) in clk_pll_set_rate() 155 spin_lock_irqsave(pll->vco->lock, flags); in clk_pll_set_rate() [all …]
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D | Makefile | 5 obj-y += clk.o clk-aux-synth.o clk-frac-synth.o clk-gpt-synth.o clk-vco-pll.o
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D | clk.h | 104 struct clk_vco *vco; member
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/drivers/clk/versatile/ |
D | clk-icst.c | 49 struct icst_vco vco; in vco_get() local 52 vco.v = val & 0x1ff; in vco_get() 53 vco.r = (val >> 9) & 0x7f; in vco_get() 54 vco.s = (val >> 16) & 03; in vco_get() 55 return vco; in vco_get() 66 struct icst_vco vco) in vco_set() argument 71 val |= vco.v | (vco.r << 9) | (vco.s << 16); in vco_set() 85 struct icst_vco vco; in icst_recalc_rate() local 87 vco = vco_get(icst->vcoreg); in icst_recalc_rate() 88 icst->rate = icst_hz(icst->params, vco); in icst_recalc_rate() [all …]
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/drivers/cpufreq/ |
D | integrator-cpufreq.c | 60 struct icst_vco vco; in integrator_verify_policy() local 66 vco = icst_hz_to_vco(&cclk_params, policy->max * 1000); in integrator_verify_policy() 67 policy->max = icst_hz(&cclk_params, vco) / 1000; in integrator_verify_policy() 69 vco = icst_hz_to_vco(&cclk_params, policy->min * 1000); in integrator_verify_policy() 70 policy->min = icst_hz(&cclk_params, vco) / 1000; in integrator_verify_policy() 86 struct icst_vco vco; in integrator_set_target() local 106 vco.s = (cm_osc >> 8) & 7; in integrator_set_target() 108 vco.s = 1; in integrator_set_target() 110 vco.v = cm_osc & 255; in integrator_set_target() 111 vco.r = 22; in integrator_set_target() [all …]
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/drivers/video/matrox/ |
D | g450_pll.c | 106 unsigned int *vco, unsigned int fout) in g450_firstpll() argument 114 *vco = vcomax; in g450_firstpll() 116 *vco = fout; in g450_firstpll() 131 *vco = tvco; in g450_firstpll() 133 return g450_nextpll(minfo, pi, vco, 0xFF0000 | p); in g450_firstpll() 440 unsigned int vco; in __g450_setclk() local 443 vco = g450_mnp2vco(minfo, mnp); in __g450_setclk() 448 if (vco < pixel_vco) { in __g450_setclk() 449 small = vco; in __g450_setclk() 453 big = vco; in __g450_setclk() [all …]
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/drivers/gpu/drm/gma500/ |
D | cdv_intel_display.c | 50 int vco; member 58 struct cdv_intel_range_t dot, vco, n, m, m1, m2, p, p1; member 81 .vco = {.min = 1800000, .max = 3600000}, 94 .vco = {.min = 1800000, .max = 3600000}, 109 .vco = {.min = 1809000, .max = 3564000}, 121 .vco = {.min = 1800000, .max = 3600000}, 133 .vco = {.min = 1809000, .max = 3564000}, 145 .vco = {.min = 1800000, .max = 3600000}, 334 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv() 337 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv() [all …]
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D | psb_intel_display.c | 39 int vco; member 54 struct psb_intel_range_t dot, vco, n, m, m1, m2, p, p1; member 64 .vco = {.min = 1400000, .max = 2800000}, 76 .vco = {.min = 1400000, .max = 2800000}, 106 clock->vco = refclk * clock->m / (clock->n + 2); in psb_intel_clock() 107 clock->dot = clock->vco / clock->p; in psb_intel_clock() 155 if (clock->vco < limit->vco.min || limit->vco.max < clock->vco) in psb_intel_PLL_is_valid()
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D | oaktrail_hdmi.c | 102 struct intel_range vco, np, nr, nf; member 122 .vco = { .min = VCO_MIN, .max = VCO_MAX }, 186 np_min = DIV_ROUND_UP(oaktrail_hdmi_limit.vco.min, target * 10); in oaktrail_hdmi_find_dpll() 187 np_max = oaktrail_hdmi_limit.vco.max / (target * 10); in oaktrail_hdmi_find_dpll()
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/drivers/media/i2c/soc_camera/ |
D | mt9t112.c | 282 u32 vco, clk; in mt9t112_clock_info() local 311 vco = 2 * m * ext / (n+1); in mt9t112_clock_info() 312 enable = ((384000 > vco) || (768000 < vco)) ? "X" : ""; in mt9t112_clock_info() 313 dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable); in mt9t112_clock_info() 315 clk = vco / (p1+1) / (p2+1); in mt9t112_clock_info() 319 clk = vco / (p3+1); in mt9t112_clock_info() 323 clk = vco / (p6+1); in mt9t112_clock_info() 327 clk = vco / (p5+1); in mt9t112_clock_info() 331 clk = vco / (p4+1); in mt9t112_clock_info() 335 clk = vco / (p7+1); in mt9t112_clock_info()
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/drivers/gpu/drm/radeon/ |
D | radeon_display.c | 761 u32 vco, post_div, tmp; in avivo_get_post_div() local 768 vco = pll->lcd_pll_out_min; in avivo_get_post_div() 770 vco = pll->pll_out_min; in avivo_get_post_div() 773 vco = pll->lcd_pll_out_max; in avivo_get_post_div() 775 vco = pll->pll_out_max; in avivo_get_post_div() 778 post_div = vco / target_clock; in avivo_get_post_div() 779 tmp = vco % target_clock; in avivo_get_post_div() 958 uint32_t vco; in radeon_compute_pll_legacy() local 967 vco = radeon_div(tmp, ref_div); in radeon_compute_pll_legacy() 969 if (vco < pll_out_min) { in radeon_compute_pll_legacy() [all …]
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/drivers/media/tuners/ |
D | max2165.c | 238 u8 vco, vco_sub_band, adc; in max2165_debug_status() local 250 vco = autotune >> 6; in max2165_debug_status() 260 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); in max2165_debug_status()
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/drivers/gpu/drm/i915/ |
D | intel_display.c | 55 int vco; member 72 intel_range_t dot, vco, n, m, m1, m2, p, p1; member 142 .vco = { .min = 930000, .max = 1400000 }, 156 .vco = { .min = 930000, .max = 1400000 }, 170 .vco = { .min = 1400000, .max = 2800000 }, 184 .vco = { .min = 1400000, .max = 2800000 }, 199 .vco = { .min = 1750000, .max = 3500000}, 215 .vco = { .min = 1750000, .max = 3500000}, 229 .vco = { .min = 1750000, .max = 3500000 }, 244 .vco = { .min = 1750000, .max = 3500000 }, [all …]
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/drivers/gpu/drm/mgag200/ |
D | mgag200_mode.c | 469 unsigned int computed, vco; in mga_g200er_set_plls() local 490 vco = pllreffreq * (testn + 1) / in mga_g200er_set_plls() 492 if (vco < vcomin) in mga_g200er_set_plls() 494 if (vco > vcomax) in mga_g200er_set_plls() 496 computed = vco / (m_div_val[testm] * (testo + 1)); in mga_g200er_set_plls()
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/drivers/video/ |
D | cyber2000fb.c | 672 int vco; in cyber2000fb_decode_clock() local 747 vco = ref_ps * best_div1 / best_mult; in cyber2000fb_decode_clock() 748 if ((ref_ps == 40690) && (vco < 5556)) in cyber2000fb_decode_clock()
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/drivers/video/intelfb/ |
D | intelfbhw.c | 668 u32 m, vco, p; in calc_vclock() local 672 vco = pll->ref_clk * m / n; in calc_vclock() 678 return vco / p; in calc_vclock()
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