| /drivers/tty/serial/ |
| D | pmac_zilog.c | 146 write_zsreg(uap, R1, in pmz_load_zsregs()
150 write_zsreg(uap, R4, regs[R4]); in pmz_load_zsregs()
153 write_zsreg(uap, R10, regs[R10]); in pmz_load_zsregs()
156 write_zsreg(uap, R3, regs[R3] & ~RxENABLE); in pmz_load_zsregs()
157 write_zsreg(uap, R5, regs[R5] & ~TxENABLE); in pmz_load_zsregs()
160 write_zsreg(uap, R15, regs[R15] | EN85C30); in pmz_load_zsregs()
161 write_zsreg(uap, R7, regs[R7P]); in pmz_load_zsregs()
164 write_zsreg(uap, R15, regs[R15] & ~EN85C30); in pmz_load_zsregs()
167 write_zsreg(uap, R6, regs[R6]); in pmz_load_zsregs()
168 write_zsreg(uap, R7, regs[R7]); in pmz_load_zsregs()
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| D | zs.c | 156 static void write_zsreg(struct zs_port *zport, int reg, u8 value) in write_zsreg() function
272 write_zsreg(zport, R3, regs[3] & ~RxENABLE); in load_zsregs()
273 write_zsreg(zport, R5, regs[5] & ~TxENAB); in load_zsregs()
274 write_zsreg(zport, R4, regs[4]); in load_zsregs()
275 write_zsreg(zport, R9, regs[9]); in load_zsregs()
276 write_zsreg(zport, R1, regs[1]); in load_zsregs()
277 write_zsreg(zport, R2, regs[2]); in load_zsregs()
278 write_zsreg(zport, R10, regs[10]); in load_zsregs()
279 write_zsreg(zport, R14, regs[14] & ~BRENABL); in load_zsregs()
280 write_zsreg(zport, R11, regs[11]); in load_zsregs()
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| D | ip22zilog.c | 125 static void write_zsreg(struct zilog_channel *channel, in write_zsreg() function
180 write_zsreg(channel, R1, in __load_zsregs()
184 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
187 write_zsreg(channel, R10, regs[R10]); in __load_zsregs()
190 write_zsreg(channel, R3, regs[R3] & ~RxENAB); in __load_zsregs()
191 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
194 write_zsreg(channel, R6, regs[R6]); in __load_zsregs()
195 write_zsreg(channel, R7, regs[R7]); in __load_zsregs()
203 write_zsreg(channel, R14, regs[R14] & ~BRENAB); in __load_zsregs()
206 write_zsreg(channel, R11, regs[R11]); in __load_zsregs()
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| D | sunzilog.c | 142 static void write_zsreg(struct zilog_channel __iomem *channel, in write_zsreg() function
199 write_zsreg(channel, R1, in __load_zsregs()
203 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
206 write_zsreg(channel, R10, regs[R10]); in __load_zsregs()
209 write_zsreg(channel, R3, regs[R3] & ~RxENAB); in __load_zsregs()
210 write_zsreg(channel, R5, regs[R5] & ~TxENAB); in __load_zsregs()
213 write_zsreg(channel, R6, regs[R6]); in __load_zsregs()
214 write_zsreg(channel, R7, regs[R7]); in __load_zsregs()
222 write_zsreg(channel, R14, regs[R14] & ~BRENAB); in __load_zsregs()
225 write_zsreg(channel, R11, regs[R11]); in __load_zsregs()
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| D | pmac_zilog.h | 91 static inline void write_zsreg(struct uart_pmac_port *port, u8 reg, u8 value) in write_zsreg() function
363 #define ZS_CLEARERR(port) (write_zsreg(port, 0, ERR_RES))
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| /drivers/net/wan/ |
| D | z85230.c | 160 static inline void write_zsreg(struct z8530_channel *c, u8 reg, u8 val) in write_zsreg() function
308 write_zsreg(c, R5, c->regs[5]); in z8530_rtsdtr()
419 write_zsreg(c, R8, *c->tx_ptr++); in z8530_tx()
425 write_zsreg(c, R10, c->regs[10]&~ABUNDER); in z8530_tx()
470 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_status()
475 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_status()
591 write_zsreg(chan, R3, chan->regs[3] | RxENABLE); in z8530_dma_status()
596 write_zsreg(chan, R3, chan->regs[3] & ~RxENABLE); in z8530_dma_status()
809 write_zsreg(c, R1, c->regs[R1]); in z8530_sync_open()
810 write_zsreg(c, R3, c->regs[R3]|RxENABLE); in z8530_sync_open()
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