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Searched refs:BA0_HICR (Results 1 – 3 of 3) sorted by relevance

/sound/pci/
Dcs4281.c83 #define BA0_HICR 0x0008 /* Host Interrupt Control Register */ macro
1626 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); in snd_cs4281_chip_init()
1817 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); in snd_cs4281_interrupt()
1872 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_EOI); in snd_cs4281_interrupt()
2019 snd_cs4281_pokeBA0(chip, BA0_HICR, BA0_HICR_CHGM); in cs4281_suspend()
/sound/pci/cs46xx/
Dcs46xx.h42 #define BA0_HICR 0x00000008 macro
Dcs46xx_lib.c1176 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); in snd_cs46xx_interrupt()
1247 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_CHGM | HICR_IEV); in snd_cs46xx_interrupt()
3055 snd_cs46xx_pokeBA0(chip, BA0_HICR, HICR_IEV | HICR_CHGM); in cs46xx_enable_stream_irqs()