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Searched refs:DEFINE_STRUCT_CLK_HW_OMAP (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-omap2/
Dcclock33xx_data.c356 DEFINE_STRUCT_CLK_HW_OMAP(l3_gclk, NULL);
360 DEFINE_STRUCT_CLK_HW_OMAP(l4hs_gclk, NULL);
368 DEFINE_STRUCT_CLK_HW_OMAP(l3s_gclk, NULL);
372 DEFINE_STRUCT_CLK_HW_OMAP(l4fw_gclk, NULL);
376 DEFINE_STRUCT_CLK_HW_OMAP(l4ls_gclk, NULL);
380 DEFINE_STRUCT_CLK_HW_OMAP(sysclk_div_ck, NULL);
389 DEFINE_STRUCT_CLK_HW_OMAP(adc_tsc_fck, NULL);
393 DEFINE_STRUCT_CLK_HW_OMAP(dcan0_fck, NULL);
397 DEFINE_STRUCT_CLK_HW_OMAP(dcan1_fck, NULL);
401 DEFINE_STRUCT_CLK_HW_OMAP(mcasp0_fck, NULL);
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Dcclock3xxx_data.c148 DEFINE_STRUCT_CLK_HW_OMAP(core_ck, NULL);
167 DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL);
199 DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm");
288 DEFINE_STRUCT_CLK_HW_OMAP(mpu_ck, "mpu_clkdm");
509 DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL);
519 DEFINE_STRUCT_CLK_HW_OMAP(cm_96m_fck, NULL);
642 DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm");
651 DEFINE_STRUCT_CLK_HW_OMAP(core_48m_fck, "core_l4_clkdm");
668 DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm");
677 DEFINE_STRUCT_CLK_HW_OMAP(core_l3_ick, "core_l3_clkdm");
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Dcclock2420_data.c92 DEFINE_STRUCT_CLK_HW_OMAP(sys_ck, "wkup_clkdm");
143 DEFINE_STRUCT_CLK_HW_OMAP(core_ck, "wkup_clkdm");
231 DEFINE_STRUCT_CLK_HW_OMAP(func_96m_ck, "wkup_clkdm");
1327 DEFINE_STRUCT_CLK_HW_OMAP(sdma_fck, "core_l3_clkdm");
1613 DEFINE_STRUCT_CLK_HW_OMAP(virt_prcm_set, NULL);
Dclock.h62 #define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \ macro
Dcclock2430_data.c92 DEFINE_STRUCT_CLK_HW_OMAP(sys_ck, "wkup_clkdm");
143 DEFINE_STRUCT_CLK_HW_OMAP(core_ck, "wkup_clkdm");
1503 DEFINE_STRUCT_CLK_HW_OMAP(sdma_fck, "core_l3_clkdm");
1792 DEFINE_STRUCT_CLK_HW_OMAP(virt_prcm_set, NULL);
Dcclock44xx_data.c766 DEFINE_STRUCT_CLK_HW_OMAP(dbgclk_mux_ck, NULL);